Systems and methods for decoding transition encoded data with protected key

Patent metadata

Field	Value
Publication number	US-12015423-B2
Application number	US-202318329429-A
Country	US
Kind code	B2
Filing date	Jun 5, 2023
Priority date	Jul 29, 2021
Publication date	Jun 18, 2024
Grant date	Jun 18, 2024

Abstract

A method for encoding may include receiving, at an encoder, a series of data bits, performing, at the encoder, first transition encoding on the data bits to generate an encoded series of data bits based on a key, performing, at the encoder, protection encoding on the key to generate key protection data, performing, at the encoder, second transition encoding on the key protection data to generate encoded key protection data, and transmitting an encoded series of transmission bits to a receiver, the encoded series of transmission bits including the encoded series of data bits and the encoded key protection data.

First claim

What is claimed is:

1. A method by an electronic device configured to decode data received from an encoder, the method comprising:
receiving, by a decoder of the electronic device, transmission bits comprising a transition encoded series of data bits and a transition encoded key protection data;
decoding, by the decoder, the transition encoded key protection data to generate a key protection data;
determining that a key is accurate based on the key protection data; and
decoding, by the decoder, the transition encoded series of data bits to generate decoded series of data bits, based on the accurate key.

2. The method of claim 1 , wherein the transition encoded key protection data comprises an inverted parity bit.

3. The method of claim 2 , wherein the generating the key protection data comprises inverting the inverted parity bit.

4. The method of claim 3 , wherein a most significant bit (MSB) of the transition encoded key protection data comprises the key protection data, the method further comprising replacing the MSB with a constant to generate the key.

5. The method of claim 4 , wherein the constant is a zero.

6. The method of claim 1 , wherein the key protection data comprises a plurality of parity bits.

7. The method of claim 6 , wherein the plurality of parity bits are based on a Hamming code.

8. The method of claim 6 , wherein the generating the key protection data comprises inverting at least one of a plurality of inverted parity bits.

9. The method of claim 8 , wherein an MSB of the transition encoded key protection data comprises the key protection data, the method further comprising replacing the MSB with a constant to generate the key.

10. The method of claim 9 , wherein the decoding the transition encoded key protection data further comprises removing one or more bits of the inverted parity bits from a front of the key and removing one or more bits of the inverted parity bits from an end of the key.

11. A decoder in an electronic device configured to decode data received from an encoder, comprising:
an input configured to receive a series of transmission bits comprising a transition encoded series of data bits and a transition encoded key protection data; and
a processor configured to execute operations comprising:
decoding the transition encoded key protection data to generate a key protection data;
determining that a key is accurate based on the key protection data; and
decoding the transition encoded series of data bits to generate decoded series of data bits, based on the accurate key.

12. The decoder of claim 11 , wherein the transition encoded key protection data comprises an inverted parity bit.

13. The decoder of claim 12 , wherein the generating the key protection data comprises inverting the inverted parity bit.

14. The decoder of claim 13 , wherein a most significant bit (MSB) of the transition encoded key protection data comprises the key protection data, the operations further comprising replacing the MSB with a constant to generate the key.

15. The decoder of claim 14 , wherein the constant is a zero.

16. The decoder of claim 11 , wherein the key protection data comprises a plurality of parity bits.

17. The decoder of claim 16 , wherein the plurality of parity bits are based on a Hamming code.

18. The decoder of claim 16 , wherein the generating the key protection data comprises inverting at least one of a plurality of inverted parity bits.

19. The decoder of claim 18 , wherein an MSB of the transition encoded key protection data comprises the key protection data, the operations further comprising replacing the MSB with a constant to generate the key.

20. The decoder of claim 19 , wherein the decoding the transition encoded key protection data further comprises removing one or more bits of the inverted parity bits from a front of the key and removing one or more bits of the inverted parity bits from an end of the key.

Assignees

• Samsung Display Co Ltd

Inventors

• Abbasfar Aliazam
• Amirkhany Amir

Classifications

• H04L1/0086

  Unequal error protection (H04L27/00 and H04L1/004 take precedence for layer 1/2 aspects, e.g. bit loading) · CPC title

• H04L1/007

  Unequal error protection (for format H04L1/0078; for codes per se H03M13/35) · CPC title

• H04L1/0041

  Arrangements at the transmitter end · CPC title

• H03M13/356

  Unequal error protection [UEP] · CPC title

• H03M13/11 Primary

  using multiple parity bits · CPC title