Graphics with adaptive temporal adjustments

Patent metadata

Field	Value
Publication number	US-12014701-B2
Application number	US-202318179067-A
Country	US
Kind code	B2
Filing date	Mar 6, 2023
Priority date	Apr 17, 2017
Publication date	Jun 18, 2024
Grant date	Jun 18, 2024

Abstract

An embodiment of an electronic processing system may include an application processor, persistent storage media communicatively coupled to the application processor, a graphics subsystem communicatively coupled to the application processor, an object space adjuster communicatively coupled to the graphics subsystem to adjust an object space parameter based on a screen space parameter, and a sample adjuster communicatively coupled to the graphics subsystem to adjust a sample parameter of the graphics subsystem based on a detected condition. Other embodiments are disclosed and claimed.

First claim

What is claimed is:

1. An apparatus comprising:
a memory interface; and
a graphics processing unit coupled to the memory interface, the graphics processing unit to:
assign a first rate to a first region of a frame; and
assign a second rate to a second region of the frame, wherein the second rate indicates a greater number of pixels to share a pixel shader result than the first rate, wherein the first rate and the second rate are selected in response to identified motion, wherein the identified motion is based on temporal anti-aliasing data, and wherein the second region corresponds to higher motion content than the first region based on the identified motion from the temporal anti-aliasing data.

2. The apparatus of claim 1 , wherein the graphics processing unit is further to:
assign a third rate to a third region of the frame, wherein the third rate indicates a greater number of pixels to share a pixel shader result than the second rate, and wherein the third rate is associated with temporal anti-aliasing data.

3. The apparatus of claim 2 , wherein the third corresponds to higher motion content than the second region.

4. The apparatus of claim 1 , wherein a number of samples for anti-aliasing are assigned to each of the first and second regions of the frame based on an associated relative motion value.

5. The apparatus of claim 4 , wherein the associated relative motion value is assigned on a per-pixel basis.

6. The apparatus of claim 4 , wherein the associated relative motion value is based on a comparison corresponding to a difference in pixel values data between the first frame and a subsequent frame as well as being based on the temporal anti-aliasing data of the subsequent frame.

7. The apparatus of claim 1 , wherein a number of samples for anti-aliasing are assigned to each of the first and second regions of the frame based on an actual complexity of a scene as determined from a prior frame.

8. The apparatus of claim 1 , wherein a number of samples for anti-aliasing are assigned to each of the first and second regions of the frame based on changes in a scene as compared with a prior frame and based on one or more detected static regions as compared with the prior frame.

9. An electronic processing system, comprising:
an application processor; and
a graphics subsystem communicatively coupled to the application processor, the graphics subsystem to:
assign a first rate to a first region of a frame; and
assign a second rate to a second region of the frame, wherein the second rate indicates a greater number of pixels to share a pixel shader result than the first rate, wherein the first rate and the second rate are selected in response to identified motion, wherein the identified motion is based on temporal anti-aliasing data, and wherein the second region corresponds to higher motion content than the first region based on the identified motion from the temporal anti-aliasing data.

10. The system of claim 9 , wherein the graphics subsystem is further to:
assign a third rate to a third region of the frame, wherein the third rate indicates a greater number of pixels to share a pixel shader result than the second rate, and wherein the third rate is associated with temporal anti-aliasing data.

11. The system of claim 10 , wherein the third corresponds to higher motion content than the second region.

12. The system of claim 9 , wherein a number of samples for anti-aliasing are assigned to each of the first and second regions of the frame based on an associated relative motion value.

13. The system of claim 12 , wherein the associated relative motion value is assigned on a per-pixel basis.

14. The system of claim 12 , wherein the associated relative motion value is based on a comparison corresponding to a difference in pixel values data between the first frame and a subsequent frame as well as being based on the temporal anti-aliasing data of the subsequent frame.

15. The system of claim 9 , wherein a number of samples for anti-aliasing are assigned to each of the first and second regions of the frame based on an actual complexity of a scene as determined from a prior frame.

16. The system of claim 9 , wherein a number of samples for anti-aliasing are assigned to each of the first and second regions of the frame based on changes in a scene as compared with a prior frame and based on one or more detected static regions as compared with the prior frame.

Assignees

• Intel Corp

Inventors

• Feng Louis
• Koker Altug
• Janczak Tomasz
• Lauritzen Andrew T
• Cimini David M
• Kaburlasos Nikos
• Ray Joydeep
• Feit John H
• Schluessler Travis T
• Kwiatkowski Jacek
• Laws Philip R
• Burke Devan
• Ould-Ahmed-Vall Elmoustapha
• Appu Abhishek R

Classifications

• G09G2360/125

  using unified memory architecture [UMA] · CPC title

• G09G2360/121

  using a cache memory · CPC title

• G09G5/363 Primary

  Graphics controllers · CPC title

• G09G2360/06

  Use of more than one graphics processor to process data before displaying to one or more screens · CPC title

• G09G5/001

  Arbitration of resources in a display system, e.g. control of access to frame buffer by video controller and/or main processor · CPC title