Touch display device and power supply control method

US12013740B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12013740-B2
Application numberUS-202117789172-A
CountryUS
Kind codeB2
Filing dateSep 14, 2021
Priority dateOct 22, 2020
Publication dateJun 18, 2024
Grant dateJun 18, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Touch display device and power supply control method are provided. The touch display device includes power supply module including: power supply control circuit; power management chip provides touch operation processing circuit, touch display control driver circuit and touch integrated circuit with operating voltage; the touch operation processing circuit provides first control signal to control signal output terminal when the touch display device is in sleep-state, to enable the power supply control circuit to supply power to the power management chip via second power supply terminal under control of the first control signal; and provides second control signal to the control signal output terminal when the touch display device is in the sleep-state and the touch display panel is touched, to enable the power supply control circuit to supply power to the power management chip via first power supply terminal under control of the second control signal.

First claim

Opening claim text (preview).

What is claimed is: 1. A touch display device, comprising a touch display panel, a touch display control driver circuit, a touch integrated circuit, a power management chip, and a touch operation processing circuit, the touch display device further comprising a power supply module; the power supply module comprising a first power supply terminal, a second power supply terminal, and a power supply control circuit; wherein the power management chip provides the touch operation processing circuit, the touch display control driver circuit and the touch integrated circuit with an operating voltage; a control terminal of the power supply control circuit is electrically connected to a control signal output terminal of the touch operation processing circuit; the touch operation processing circuit is configured for providing a first control signal to the control signal output terminal when the touch display device is in a sleep state, to enable the power supply control circuit to supply power to the power management chip via the second power supply terminal under control of the first control signal; and the touch operation processing circuit is further configured for providing a second control signal to the control signal output terminal when the touch display device is in the sleep state and the touch display panel is touched, to enable the power supply control circuit to supply power to the power management chip via the first power supply terminal under control of the second control signal. 2. The touch display device according to claim 1 , wherein the first power supply terminal is configured for providing a voltage signal of 0 V when the touch display device is in the sleep state; and the touch display device further comprises a system terminal; the touch operation processing circuit is configured for providing a wake-up prompt signal to the system terminal when the touch display device is in the sleep state and the touch display panel is touched; and the system terminal controls the first power supply terminal to provide a first operating voltage upon reception of the wake-up prompt signal. 3. The touch display device according to claim 2 , wherein the touch operation processing circuit is further configured for providing the second control signal to the control signal output terminal when the touch display device is in a normal operating state, to enable the power supply control circuit to supply power to the power management chip via the first power supply terminal under control of the second control signal; wherein when the touch display device is in the normal operating state, the touch display device performs both displaying and touch controlling normally. 4. The touch display device according to claim 2 , further comprising a timing controller; and wherein the touch operation processing circuit and the timing controller are integrated on a single chip. 5. The touch display device according to claim 1 , wherein the touch operation processing circuit is further configured for providing the second control signal to the control signal output terminal when the touch display device is in a normal operating state, to enable the power supply control circuit to supply power to the power management chip via the first power supply terminal under control of the second control signal; wherein when the touch display device is in the normal operating state, the touch display device performs both displaying and touch controlling normally. 6. The touch display device according to claim 5 , wherein the power supply control circuit comprises a first resistor, a second resistor, a third resistor, a first control circuit, a second control circuit, a third control circuit, and a fourth control circuit, wherein, a control terminal of the first control circuit is electrically connected to the control signal output terminal; a first terminal of the first control circuit is electrically connected to a control terminal of the second control circuit, a control terminal of the third control circuit and a first terminal of the first resistor; a second terminal of the first resistor is electrically connected to the second power supply terminal; a second terminal of the first control circuit is electrically connected to a first voltage terminal; the first control circuit is configured for controlling the control terminal of the second control circuit to be connected to the first voltage terminal, and controlling the control terminal of the third control circuit to be connected to the first voltage terminal when the control signal output terminal outputs the first control signal; the first control circuit is further configured for controlling the control terminal of the second control circuit to be disconnected from the first voltage terminal and controlling the control terminal of the third control circuit to be disconnected from the first voltage terminal when the control signal output terminal outputs the second control signal; a first terminal of the second control circuit is electrically connected to the second power supply terminal, a second terminal of the second control circuit is electrically connected to a control terminal of the fourth control circuit, and the second terminal of the second control circuit is electrically connected to a second voltage terminal via the second resistor, the second control circuit is configured for controlling the second power supply terminal to be connected to the control terminal of the fourth control circuit when the control terminal of the second control circuit is in connection with the first voltage terminal, and the second control circuit is further configured for controlling the second power supply terminal to be disconnected from the control terminal of the fourth control circuit when the control terminal of the second control circuit is disconnected from the first voltage terminal; a first terminal of the third control circuit is electrically connected to the second power supply terminal, and a second terminal of the third control circuit is electrically connected to the power management chip via the third resistor, the third control circuit is configured for controlling to supply power to the power management chip via the second power supply terminal when the control terminal of the third control circuit is in connection with the first voltage terminal, and the third control circuit is further configured for controlling the second power supply terminal to be disconnected from the power management chip when the control terminal of the third control circuit is disconnected from the first voltage terminal; and a first terminal of the fourth control circuit is electrically connected to the first power supply terminal, and a second terminal of the fourth control circuit is electrically connected to the power management chip via the third resistor, the fourth control circuit is configured for controlling the first power supply terminal to be disconnected from the power management chip when the control terminal of the fourth control circuit is electrically connected to the second power supply terminal, and the fourth control circuit is further configured for controlling to supply power to the power management chip via the first power supply terminal when the control terminal of the fourth control circuit is disconnected from the second power supply terminal. 7. The touch display device according to claim 6 , wherein the first control circuit comprises a first control transistor and a first control resistor; a control terminal of the first control transistor is electrically connected to the control signal output terminal; a first electrode of the first control transistor is electrically connected to the control terminal of the second control circuit, the control termi

Assignees

Inventors

Classifications

  • Power saving in display device · CPC title

  • G06F3/0416Primary

    Control or interface arrangements specially adapted for digitisers · CPC title

  • by lowering the supply or operating voltage · CPC title

  • G06F1/3231Primary

    Monitoring the presence, absence or movement of users · CPC title

  • by switching to a less power-consuming processor, e.g. sub-CPU · CPC title

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Frequently asked questions

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What does patent US12013740B2 cover?
Touch display device and power supply control method are provided. The touch display device includes power supply module including: power supply control circuit; power management chip provides touch operation processing circuit, touch display control driver circuit and touch integrated circuit with operating voltage; the touch operation processing circuit provides first control signal to contro…
Who is the assignee on this patent?
Beijing Boe Optoelectronics Tech Co Ltd, Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F3/0416. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 18 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).