Pixel driving circuit and method for driving the same, and display substrate

Patent metadata

Field	Value
Publication number	US-12008960-B2
Application number	US-202118014254-A
Country	US
Kind code	B2
Filing date	Nov 22, 2021
Priority date	May 31, 2021
Publication date	Jun 11, 2024
Grant date	Jun 11, 2024

Abstract

A pixel driving circuit includes a data writing circuit, a light-emitting control circuit and a light-emitting diode chip. The data writing circuit is electrically connected to a first scanning signal terminal, a data signal terminal and a first node. The light-emitting control circuit is electrically connected to the first node, an enable signal terminal, a first voltage signal terminal and a second node, and is configured to transmit a first voltage signal received at the first voltage signal terminal to the second node. The light-emitting diode chip is electrically connected to the second node and a second voltage signal terminal. The light-emitting diode chip includes a plurality of light-emitting portions. The light-emitting diode chip is configured to drive the plurality of light-emitting portions to emit light in different periods of time respectively or drive at least two light-emitting portions to emit light in a same period of time.

First claim

What is claimed is:

1. A pixel driving circuit, comprising:
a data writing circuit electrically connected to a first scanning signal terminal, a data signal terminal and a first node, the data writing circuit being configured to transmit a data signal received at the data signal terminal to the first node in response to a first scanning signal received at the first scanning signal terminal;
a light-emitting control circuit electrically connected to the first node, an enable signal terminal, a first voltage signal terminal and a second node, the light-emitting control circuit being configured to transmit a first voltage signal received at the first voltage signal terminal to the second node under control of a voltage of the first node and an enable signal transmitted by the enable signal terminal;
a first reset compensation circuit, and
a light-emitting diode chip electrically connected to the second node and a second voltage signal terminal, wherein
the light-emitting diode chip includes a plurality of light-emitting portions; the plurality of light-emitting portions include at least one first light-emitting portion and at least one second light-emitting portion;
a first bonding electrode of a first light-emitting portion in the at least one first light-emitting portion is electrically connected to the second node, and a second bonding electrode of the first light-emitting portion is electrically connected to the second voltage signal terminal;
a first bonding electrode of a second light-emitting portion in the at least one second light-emitting portion is electrically connected to the second voltage signal terminal, and a second bonding electrode of the second light-emitting portion is electrically connected to the second node;
the light-emitting diode chip is configured to, with cooperation of the first voltage signal from the second node and a second voltage signal received at the second voltage signal terminal, drive the plurality of light-emitting portions to emit light in different periods of time respectively or drive at least two light-emitting portions in the plurality of light-emitting portions to emit light in a same period of time;
wherein the light-emitting control circuit includes a first transistor and a second, transistor;
a control electrode of the first transistor is electrically connected to the enable signal terminal, a first electrode of the first transistor is electrically connected to the first voltage signal terminal, and a second electrode of the first transistor is electrically connected to a third node;
a control electrode of the second transistor is electrically connected to the first node, a first electrode of the second transistor is electrically connected to the third node, and a second electrode of the second transistor is electrically connected to the second node,
wherein the first reset compensation circuit is electrically connected to the first scanning signal terminal, a second scanning signal terminal, the first node, the second node, the third node and the second voltage signal terminal; and the first reset compensation circuit is configured to, under control of the first scanning signal and a second scanning signal received at the second scanning signal terminal, reset the pixel driving circuit and compensate for a threshold voltage of the second transistor;
the first reset compensation circuit includes a third transistor, a fourth transistor, a fifth transistor, a sixth transistor and a first capacitor;
a control electrode of the third transistor is electrically connected to the first scanning signal terminal, a first electrode of the third transistor is electrically connected to the second voltage signal terminal, and a second electrode of the third transistor is electrically connected to a fourth node;
a control electrode of the fourth transistor is electrically connected to the second scanning signal terminal, a first electrode of the fourth transistor is electrically connected to the third node, and a second electrode of the fourth transistor is electrically connected to a fifth node;
a control electrode of the fifth transistor is electrically connected to the second scanning signal terminal, a first electrode of the fifth transistor is electrically connected to the second node, and a second electrode of the fifth transistor is electrically connected to the fifth node;
a control electrode of the sixth transistor is electrically connected to the first scanning signal terminal, a first electrode of the sixth transistor is electrically connected to the fourth node, and a second electrode of the sixth transistor is electrically connected to the first node; and
a first terminal of the first capacitor is electrically connected to the fourth node, and a second terminal of the first capacitor is electrically connected to the fifth node.

2. The pixel driving circuit according to claim 1 , further comprising a plurality of switching transistors,
wherein a first bonding electrode of a light-emitting portion in the plurality of light-emitting portions is electrically connected to the second node through at least one switching transistor in the plurality of switching transistors; and/or
a second bonding electrode of the light-emitting portion is electrically connected to the second voltage signal terminal through at least one other switching transistor in the plurality of switching transistors.

3. The pixel driving circuit according to claim 2 , wherein a number of the plurality of light-emitting portions is equal to a number of the plurality of switching transistors; and
the first bonding electrode of the light-emitting portion is electrically connected to the second node directly, and the second bonding electrode of the light-emitting portion is electrically connected to the second voltage signal terminal through one switching transistor.

4. The pixel driving circuit according to claim 2 , wherein a number of the plurality of light-emitting portions is less than a number of the plurality of switching transistors;
a first bonding electrode of one light-emitting portion in the plurality of light-emitting portions is electrically connected to the second node directly, and is electrically connected to a first bonding electrode of another light-emitting portion in the plurality of light-emitting portions through at least one switching transistor in the plurality of switching transistors;
a second bonding electrode of the one light-emitting portion in the plurality of light-emitting portions is electrically connected to the second voltage signal terminal through at least one other switching transistor in the plurality of switching transistors, and is electrically connected to the first bonding electrode of the another light-emitting portion through at least one yet other switching transistor in the plurality of switching transistors; and
a second bonding electrode of the another light-emitting portion is electrically connected to the second voltage signal terminal directly.

5. The pixel driving circuit according to claim 2 , wherein the light-emitting control circuit includes a seventh transistor and an eighth transistor;
a control electrode of the seventh transistor is electrically connected to the first node, a first electrode of the seventh transistor is electrically connected to the first voltage signal terminal, and a second electrode of the seventh transistor is electrically connected to a sixth node; and
a control electrode of the eighth transistor is electrically connected to the enable signal terminal, a first electrode of the eighth transistor is electrically connected to the sixth node, and a second electrode of the eighth transistor is electrically connected to the second node.

6. The pixel driving circuit according to claim 5 , further

Assignees

• Boe Technology Group Co Ltd

Inventors

• Liu Weixing
• Peng Kuanjun
• Qin Bin
• Dong Xue
• Zhang Fangzhen
• Teng Wanpeng
• Wang Tieshi
• Chen Wanzhi
• Guo Kai
• Zhang Chunfang

Classifications

• H10H29/142

  Two-dimensional arrangements, e.g. asymmetric LED layout · CPC title

• H10H20/831

  characterised by their shape · CPC title

• H10H20/812

  within the light-emitting regions, e.g. having quantum confinement structures · CPC title

• G09G2320/0233

  Improving the luminance or brightness uniformity across the screen · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title