Co-packaged switch with integrated quantum key distribution capabilities

Patent metadata

Field	Value
Publication number	US-12008147-B2
Application number	US-202117520093-A
Country	US
Kind code	B2
Filing date	Nov 5, 2021
Priority date	Oct 29, 2021
Publication date	Jun 11, 2024
Grant date	Jun 11, 2024

Abstract

Devices, networking devices, and switches, among other things, are disclosed. An illustrative switch is disclosed to include a plurality of optical Input/Output (I/O) ports; a multi-chip module (MCM) assembly including switching circuitry and at least one chiplet that is optically coupled with one of the plurality of optical I/O ports; and a controller coupled with the at least one chiplet and configured to couple the at least one chiplet with a Quantum Key Distribution (QKD) device.

First claim

What is claimed is:

1. A switch, comprising:
a multi-chip module (MCM) assembly, comprising:
switching circuitry;
an encryption unit that is configured to encrypt and/or decrypt communications processed by the switching circuitry; and
a plurality of chiplets, wherein at least one of the plurality of chiplets comprises the encryption unit; and

a controller coupled with the MCM assembly and configured to provide interconnectivity between the MCM assembly and a Quantum Key Distribution (QKD) device.

2. The switch of claim 1 , wherein the controller is coupled with the MCM assembly via a serial communication interface.

3. The switch of claim 1 , wherein the controller is coupled with the QKD device via a network interface.

4. The switch of claim 1 , wherein the controller is coupled with the QKD device via at least one of a trace and a cable.

5. The switch of claim 1 , further comprising:
an optical Input/Output (I/O) port.

6. The switch of claim 5 , wherein the optical I/O port is coupled with the MCM assembly through the QKD device.

7. The switch of claim 1 , wherein the at least one of the plurality of chiplets further comprises transmission/receiver optics, wherein the transmission/receiver optics are coupled with an optical Input/Output (I/O) port of the switch via an optical fiber, and wherein the encryption unit of the at least one of the plurality of chiplets is coupled to the controller via a serial interface.

8. The switch of claim 1 , wherein the MCM assembly, controller, and QKD device are housed within a common enclosure.

9. A networking device, comprising:
a plurality of optical Input/Output (I/O) ports;
a multi-chip module (MCM) assembly comprising switching circuitry and at least one chiplet that is optically coupled with one of the plurality of optical I/O ports; and
a controller coupled with the at least one chiplet and configured to couple the at least one chiplet with a Quantum Key Distribution (QKD) device.

10. A device, comprising:
processing circuitry configured to:
facilitate communication between a quantum key distribution (QKD) device and a plurality of encryptor/decryptor devices of a plurality of chiplets coupled to a main chip; and
perform at least one QKD function on behalf of the QKD device.

11. The device of claim 10 , wherein the at least one QKD function includes one or more key management operations.

12. The device of claim 10 , wherein the at least one QKD function performed by the processing circuitry on behalf of the QKD device includes one or more of the following: providing a physical layer of a quantum channel, providing a service channel, providing a QKD stack, sifting, error correction, confirmation, privacy amplification, key management, device pairing, key buffering, interfacing with a key consumer, providing a Quantum Random Number Generator (QRNG), and providing a physical interface with the key consumer.

13. The device of claim 10 , wherein the processing circuity includes:
a first port that couples to the plurality of encryptor/decryptor devices; and
a second port that couples to the QKD device.

14. The device of claim 13 , wherein the first port and the second port each comprise an electrical interface.

15. The device of claim 14 , wherein the electrical interface for the first port comprises a serial interface.

16. The device of claim 10 , further comprising:
the plurality of chiplets;
the main chip; and
a plurality of input/output ports coupled to the plurality of chiplets.

17. The device of claim 16 , wherein the plurality of input/output ports are coupled to optical transceivers of the plurality of chiplets.

18. The device of claim 16 , further comprising:
one or more pluggable ports that detachably connect to the QKD device.

19. The device of claim 16 , further comprising:
an optical switch coupled between the plurality of input/output ports and at least one port that couples to the QKD device.

20. A switch, comprising:
a multi-chip module (MCM) assembly, comprising:
switching circuitry;
an encryption unit that is configured to encrypt and/or decrypt communications processed by the switching circuitry; and
a plurality of chiplets, wherein at least one of the plurality of chiplets comprises the encryption unit and

a controller coupled with the MCM assembly and configured to provide interconnectivity between the MCM assembly and a Quantum Key Random Number Generator (QRNG).

21. A switch, comprising:
a multi-chip module (MCM) assembly, comprising:
switching circuitry configured to process electrical signals; and
a plurality of chiplets in communication with the switching circuitry, wherein at least one of the plurality of chiplets is configured to process electrical signals and optical signals; and

a controller coupled with the MCM assembly and configured to provide interconnectivity between the MCM assembly and a Quantum Key Distribution (QKD) device.

22. The switch of claim 21 , wherein the at least one of the plurality of chiplets is configured to convert electrical signals to optical signals and optical signals to electrical signals.

23. The switch of claim 21 , wherein the at least one of the plurality of chiplets includes an encryption unit that is configured to encrypt and/or decrypt the electrical signals processed by the switching circuitry.

24. The switch of claim 21 , further comprising:
a plurality of optical input/output (I/O) ports, wherein at least one of the plurality of optical I/O ports is optically connected to the at least one of the plurality of chiplets.

Assignees

• Mellanox Technologies Ltd

Inventors

• Bakopoulos Paraskevas
• Patronas Ioannis (Giannis)
• Syrivelis Dimitris
• Mula Liron
• Levy Aviad
• Mentovich Elad

Classifications

• G06F21/85 Primary

  interconnection devices, e.g. bus-connected or in-line devices · CPC title

• H04L63/061

  for key exchange, e.g. in peer-to-peer networks (cryptographic mechanisms or cryptographic arrangements for key agreement H04L9/0838) · CPC title

• H04L63/0435

  wherein the sending and receiving network entities apply symmetric encryption, i.e. same key used for encryption and decryption (cryptographic mechanisms or cryptographic arrangements for symmetric key encryption H04L9/06) · CPC title

• H04L9/0852

  Quantum cryptography (transmission systems employing electromagnetic waves other than radio waves, e.g. light, infrared H04B10/00; wavelength-division multiplex systems H04J14/02; WDM arrangements H04J14/03) · CPC title

• G06F21/72 Primary

  in cryptographic circuits · CPC title