Inductive current digital-to-analog converter (DAC) and related control options

Patent metadata

Field	Value
Publication number	US-12003251-B2
Application number	US-202217703300-A
Country	US
Kind code	B2
Filing date	Mar 24, 2022
Priority date	May 21, 2021
Publication date	Jun 4, 2024
Grant date	Jun 4, 2024

Abstract

An inductive current digital-to-analog converter (DAC) includes: a power supply input adapted to be coupled to a power supply; a load terminal adapted to be coupled to a load; an inductor between the power supply input and the load terminal; and inductor current control circuitry. The inductor current control circuitry has: a sense signal input configured to receive a sense signal representative of the inductor current; a control code input configured to receive a control code; a set of switches having respective control terminals; and a set of control circuit outputs coupled to the respective control terminals of the set of switches. The inductor current control circuitry is configured to adjust control signals provided to the set of control circuit outputs based on the sense signal and the control code.

First claim

What is claimed is:

1. An inductive current digital-to-analog converter (DAC) comprising:
an inductor having a first terminal and a second terminal;
inductor current control circuitry having:
a sense signal input;
a control code input;
a set of switches having respective control terminals; and
a set of control circuit outputs coupled to the respective control terminals of the set of switches;

a phase selection circuit having a phase selection circuit input and a phase selection circuit output; and
a driver circuit having a driver circuit input and driver circuit outputs, the driver circuit input coupled to the phase selection circuit output, the driver circuit outputs coupled to the set of control circuit outputs.

2. The inductive current DAC of claim 1 , wherein the phase selection circuit input is a first phase selection circuit input, the phase selection circuit includes a second phase selection circuit input configured to receive a load control signal.

3. The inductive current DAC of claim 1 , wherein the inductor current control circuitry further includes:
sense circuitry having a sense circuitry input and a sense circuitry output, the sense circuitry input coupled to the sense signal input; and
comparison circuitry having a comparison circuitry input and a comparison circuitry output, the comparison circuitry input coupled to the sense circuitry output, the comparison circuitry output coupled to the phase selection circuit input.

4. The inductive current DAC of claim 3 , wherein the comparison circuitry input is a first comparison circuitry input, the comparison circuitry includes a second comparison circuitry input, the inductor current control circuitry includes control logic having a control logic input and a control logic output, the control logic input coupled to the control code input and the control logic output coupled to the second comparison circuitry input.

5. The inductive current DAC of claim 1 , wherein the set of switches include:
a first switch adapted to be coupled to a power supply and the first terminal of the inductor; and
a second switch coupled to a second terminal of the inductor and ground.

6. The inductive current DAC of claim 5 , wherein the set of switches includes a third switch coupled to the first terminal of the inductor and ground.

7. The inductive current DAC of claim 5 , wherein the set of switches includes a third switch and a fourth switch in series coupled to the first terminal of the inductor and the second terminal of the inductor.

8. The inductive current DAC of claim 5 , wherein the set of switches includes a third switch coupled to the second terminal of the inductor and the power supply.

9. An inductive current digital-to-analog converter (DAC) circuit, comprising:
an inductor having a first terminal and a second terminal;
a first field-effect transistor (FET) having a first current terminal, a second current terminal and a first control terminal, the first current terminal of the first FET coupled to the the first terminal of the inductor, and the second current terminal of the first FET coupled to the second terminal of the inductor;
a second FET having a first current terminal, a second current terminal and a second control terminal, the first current terminal of the second FET coupled to the second terminal of the inductor, and the second current terminal of the second FET coupled to ground;
a third FET having a first current terminal, a second current terminal and a fourth control terminal, the first current terminal of the third FET coupled to the first terminal of the inductor, and the second current terminal of the third FET coupled to ground; and
a control circuit coupled to the first control terminal, the second control terminal, and the third control terminal, wherein the control circuit is configured to provide selectively provide control signals to the first control terminal, the second control terminal, and the third control terminal to support different phases of the inductive current DAC.

10. The inductive current DAC circuit of claim 9 , wherein the inductor is operable to conduct an inductor current, and the control circuit includes:
sense circuitry configured to receive a sense signal representative of the inductor current and to provide an inductor current sample based on the sense signal;
comparison circuitry configured to compare the sense signal sample to a maximum inductor current threshold and a minimum inductor current threshold;
phase selection circuitry configured select a phase based on result of the comparison performed by the comparison circuitry; and
driver circuitry configured to provide the control signals based on the selected phase.

11. The inductive current DAC circuit of claim 10 , wherein the control circuit is configured to:
receive a control code; and
adjust the maximum inductor current threshold and a minimum inductor current threshold based on the control code.

12. The inductive current DAC circuit of claim 10 , wherein the control circuit is configured to:
receive a load control signal; and
adjust the phase based on the load control signal.

13. The inductive current DAC circuit of claim 9 , wherein the control circuit is configured to support a magnetization phase, a first output phase, a second output phase and an energy storage phase of the inductive current DAC, the magnetization phase based on the control circuit providing control signals to turn on the first and second FETs and to turn off the third FETs, the first output phase based on the control circuit providing control signals to turn on the first FET and to turn off the second and third FETs, the second output phase based on the control circuit providing control signals to turn on the third FET and to turn off the first and second FETs, and the energy storage phase based on the control circuit providing control signals to turn on the second and third FETs and to turn off the first FET.

14. The inductive current DAC circuit of claim 9 , wherein the load is an optical transmitter load, and the control circuit is configured to:
receive a load control signal and a control code related to the optical transmitter load; and
adjust timing of the different phases of the inductive current DAC based on the load control signal and the control code related to the optical transmitter load.

15. The inductive current DAC circuit of claim 9 , wherein the load is a proximity sensor load, and the control circuit is configured to:
receive a load control signal and a control code related to the proximity sensor load; and
adjust timing of the different phases of the inductive current DAC based on the load control signal and the control code related to the proximity sensor load.

16. The inductive current DAC circuit of claim 9 , wherein the load is a range sensor load, and the control circuit is configured to:
receive a load control signal and a control code related to the range sensor load; and
adjust timing of the different phases of the inductive current DAC based on the load control signal and the control code related to the range sensor load.

Assignees

• Texas Instruments Inc

Inventors

• Moctezuma Ariel D
• Dina Marius
• Krenik William R

Classifications

• H03M1/742 Primary

  using current sources as quantisation value generators · CPC title

• H03M1/665

  with intermediate conversion to phase of sinusoidal or similar periodical signals · CPC title

• H03M1/0631

  Smoothing · CPC title