Active filter configured to suppress out-of-band peaking and an analog-to-digital converter using the same

Patent metadata

Field	Value
Publication number	US-11996814-B2
Application number	US-201917059491-A
Country	US
Kind code	B2
Filing date	Aug 5, 2019
Priority date	Sep 7, 2018
Publication date	May 28, 2024
Grant date	May 28, 2024

Abstract

An active filter and an analog-to-digital converter (ADC) configured to suppress out-of-band peaking. An active filter may include an active device configured to provide a power gain to an input signal, a feedback network configured to connect an output of the active device to an input of the active device, and an input impedance network configured to couple the input signal to the input of the active device. A combination of the feedback network and the input impedance network is configured to provide frequency response properties of the active filter such that a frequency domain signal transfer function of the active filter has a constant in numerator.

First claim

What is claimed is:

1. An active filter, comprising:
an active device configured to provide a power gain to an input signal;
a feedback network configured to couple an output of the active device to an input of the active device; and
an input impedance network configured to couple the input signal to the input of the active device,
wherein a combination of the feedback network and the input impedance network is configured to provide frequency response properties of the active filter such that a numerator of a frequency domain signal transfer function of the active filter is a constant,
wherein the input impedance network has a linear s-polynomial in a numerator of an s-domain impedance of the input impedance network.

2. The active filter of claim 1 , wherein the feedback network includes a parallel resistor-capacitor network coupling an output of the active device to an input of the active device.

3. The active filter of claim 1 , wherein the feedback network includes a series resistor-capacitor network coupling an inverse of the output of the active device to the input of the active device.

4. The active filter of claim 1 , wherein the input impedance network comprises a resistor path coupling the input signal to the input of the active device and a resistor-capacitor path coupled to the resistor path in parallel and coupling an inverse of the input signal to the input of the active device.

5. The active filter of claim 1 , wherein the active device is a differential amplifier and the feedback network includes two parallel resistor-capacitor networks, each coupling one of differential outputs of the active device to a differential input of inverse polarity of the active device, and two series resistor-capacitor networks, each coupling one of the differential outputs of the active device to a differential input of same polarity of the active device.

6. The active filter of claim 5 , wherein the input impedance network includes two sets of parallel resistor and resistor-capacitor networks, each set coupling one of differential input signals to differential inputs of the active device.

7. The active filter of claim 5 , wherein the input impedance network comprises two sets of parallel resistor-resistor and resistor-capacitor networks, each coupling one of differential input signals to differential inputs of the active device.

8. The active filter of claim 1 , wherein the active device is an operational amplifier or an operational transconductance amplifier.

9. The active filter of claim 1 , wherein a number of active devices in the active filter is smaller than an order of the active filter.

10. A sigma delta analog-to-digital converter, comprising:
a loop filter;
a quantizer; and
a digital-to-analog converter,
wherein the loop filter comprises:
an active device configured to provide a power gain to an input signal;
a feedback network configured to connect an output of the active device to an input of the active device; and
an input impedance network configured to couple the input signal to the input of the active device,

wherein a combination of the feedback network and the input impedance network is configured to provide frequency response properties of the loop filter such that a numerator of a frequency domain signal transfer function of the loop filter is a constant,
wherein the input impedance network has a linear s-polynomial in a numerator of an s-domain impedance of the input impedance network.

11. The sigma delta analog-to-digital converter of claim 10 , wherein the feedback network includes a parallel resistor-capacitor network coupling an output of the active device to an input of the active device.

12. The sigma delta analog-to-digital converter of claim 10 , wherein the feedback network includes a series resistor-capacitor network coupling an inverse of the output of the active device to the input of the active device.

13. The sigma delta analog-to-digital converter of claim 10 , wherein the input impedance network comprises a resistor path coupling the input signal to the input of the active device and a resistor-capacitor path coupled to the resistor path in parallel and coupling an inverse of the input signal to the input of the active device.

14. The sigma delta analog-to-digital converter of claim 10 , wherein the active device is a differential amplifier and the feedback network includes two parallel resistor-capacitor networks, each coupling one of differential outputs of the active device to a differential input of opposite polarity of the active device, and two series resistor-capacitor networks, each coupling one of the differential outputs of the active device to a differential input of same polarity of the active device.

15. The sigma delta analog-to-digital converter of claim 14 , wherein the input impedance network includes two sets of parallel resistor and resistor-capacitor networks, each set coupling one of differential input signals to differential inputs of the active device.

16. The sigma delta analog-to-digital converter of claim 14 , wherein the input impedance network comprises two sets of parallel resistor-resistor and resistor-capacitor networks, each coupling one of differential input signals to differential inputs of the active device.

17. The sigma delta analog-to-digital converter of claim 10 , wherein the active device is an operational amplifier or an operational transconductance amplifier.

18. The sigma delta analog-to-digital converter of claim 10 , wherein a number of active devices in the loop filter is smaller than an order of the loop filter.

Assignees

• Intel Corp

Inventors

• Camponeschi Matteo
• Doerrer Lukas
• Torta Patrick

Classifications

• H03H11/1286 Primary

  Sallen-Key biquad · CPC title

• H03H7/38

  Impedance-matching networks · CPC title

• H03M3/424

  the quantiser being a multiple bit one · CPC title

• H03M3/438

  the modulator having a higher order loop filter in the feedforward path · CPC title

• H03M3/458

  Analogue/digital converters using delta-sigma modulation as an intermediate step · CPC title