Generating random addresses for nonvolatile storage of sensitive data

US11996167B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11996167-B2
Application numberUS-202017636982-A
CountryUS
Kind codeB2
Filing dateAug 14, 2020
Priority dateAug 31, 2019
Publication dateMay 28, 2024
Grant dateMay 28, 2024

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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A random number generator selects addresses while a ‘scoreboard’ bank of registers (or bits) tracks which addresses have already been output (e.g., for storing or retrieval of a portion of the data.) When the scoreboard detects an address has already been output, a second address which has not been used yet is output rather than the randomly selected one. The second address may be selected from nearby addresses that have not already been output.

First claim

Opening claim text (preview).

What is claimed is: 1. A memory access circuit, comprising: a nonvolatile memory to store a secret block of data; a nonvolatile memory controller to receive requests to access the secret block of data and to output one time for each request, in different access patterns and to the nonvolatile memory, each of a set of addresses that address the secret block of data in the nonvolatile memory; a candidate address generator to randomly select candidate addresses from the set of addresses and provide the candidate addresses to an output selector; a repeat address detector to determine whether, before all of the addresses from the set of addresses have been provided to the nonvolatile memory controller in response to a request, a candidate address has already been output at least one time; and, the output selector to provide the candidate address to the nonvolatile memory controller if the candidate address has not already been provided to the nonvolatile memory controller in response to the request at least one time and to, if the candidate address has already been provided to the nonvolatile memory controller in response to the request at least one time, select from the set of addresses and provide a different address that has not already been provided to the nonvolatile memory controller in response to the request at least one time. 2. The memory access circuit of claim 1 , further comprising: a set of indicators corresponding to respective ones of the set of addresses, the set of indicators corresponding to whether the respective ones of the set of addresses have already been provided to the nonvolatile memory controller in response to the request at least one time. 3. The memory access circuit of claim 2 , further comprising: an indicator updater to, when an address is provided to the nonvolatile memory controller in response to the request, alter a value of a corresponding one of the set of indicators. 4. The memory access circuit of claim 2 , wherein the different address is selected based at least in part on the set of indicators. 5. The memory access circuit of claim 1 , wherein the candidate addresses are selected based on values from a random number generator. 6. The memory access circuit of claim 5 , wherein the different address is selected based at least in part on a value from the random number generator. 7. The memory access circuit of claim 5 , wherein the values from the random number generator index to the candidate addresses. 8. A method of providing randomized access patterns to a block of secret data, comprising: receiving a request to access the block of secret data; selecting, in response to the request and based at least in part on a first randomly generated number, a first address from a set of memory access addresses that address the block of secret data; providing, in response to the request, the first address to a nonvolatile memory controller; selecting, in response to the request and based at least in part on a second randomly generated number, a second address from the set of memory access addresses; determining whether the second address has been provided, to the nonvolatile memory controller in response to the request, before all of the other addresses in the set of memory access addresses have been provided to the nonvolatile memory controller in response to the request; if the second address has not already been provided to the nonvolatile memory controller in response to the request before all of the other addresses in the set of memory access addresses have been provided to the nonvolatile memory controller in response to the request, providing the second address to the nonvolatile memory controller; and, if the second address has already been provided to the nonvolatile memory controller in response to the request before all of the other addresses in the set of memory access addresses have been provided to the nonvolatile memory controller in response to the request, selecting a third address that has not already been provided to the nonvolatile memory controller in response to the request before all of the other addresses in the set of memory access addresses have been provided to the nonvolatile memory controller in response to the request and providing, to the nonvolatile memory controller, the third address. 9. The method of claim 8 , further comprising: maintaining a set of indicators each corresponding to respective ones of the set of memory access addresses, the set of indicators associated with whether the respective ones of the set of memory access addresses have been provided to the nonvolatile memory controller in response to the request before all of the other addresses in the set of access addresses have been provided to the nonvolatile memory controller. 10. The method of claim 8 , further comprising: altering a value of a one of the set of indicators when a memory access address corresponding to the one of the set of indicators is provided to the nonvolatile memory controller in response to the request. 11. The method of claim 8 , wherein the third address is selected based at least in part on the set of indicators. 12. The method of claim 8 , wherein the first address is selected based on at least one value from a random number generator. 13. The method of claim 12 , wherein the third address is selected based at least in part on a value from the random number generator. 14. The method of claim 12 , wherein values from the random number generator index to the first address and the second address and do not index to the third address.

Assignees

Inventors

Classifications

  • G11C8/16Primary

    Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups · CPC title

  • Random or pseudo-random number generators · CPC title

  • Group selection circuits, e.g. for memory block selection, chip selection, array selection · CPC title

  • Address safety or protection circuits, i.e. arrangements for preventing unauthorized or accidental access · CPC title

  • Evaluating degradation, retention or wearout, e.g. by counting writing cycles · CPC title

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What does patent US11996167B2 cover?
A random number generator selects addresses while a ‘scoreboard’ bank of registers (or bits) tracks which addresses have already been output (e.g., for storing or retrieval of a portion of the data.) When the scoreboard detects an address has already been output, a second address which has not been used yet is output rather than the randomly selected one. The second address may be selected from…
Who is the assignee on this patent?
Cryptography Res Inc, Rambus Inc
What technology area does this patent fall under?
Primary CPC classification G11C8/16. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 28 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).