Organic light-emitting display apparatus
US-10255853-B2 · Apr 9, 2019 · US
US11990092B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11990092-B2 |
| Application number | US-202318110971-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 17, 2023 |
| Priority date | Sep 16, 2014 |
| Publication date | May 21, 2024 |
| Grant date | May 21, 2024 |
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An organic light-emitting display apparatus including an organic light-emitting diode emitting visible light, a driving thin film transistor driving the organic light-emitting diode, and a compensation thin film transistor. The compensation thin film transistor includes a compensation gate electrode, a compensation semiconductor layer, a compensation source electrode, and a compensation drain electrode. The compensation gate electrode includes a first gate electrode, and a second gate electrode electrically connected to the first gate electrode. The compensation drain electrode is electrically connected to the driving gate electrode of the driving thin film transistor. The compensation semiconductor layer includes a first semiconductor region overlapping the first gate electrode and a second semiconductor region overlapping the second gate electrode and disposed further from the compensation drain electrode than the first semiconductor region, and an area of the first semiconductor region is different than an area of the second semiconductor region.
Opening claim text (preview).
What is claimed is: 1. An organic light-emitting display apparatus, comprising: a first scanning line; a second scanning line; a first voltage line; a second voltage line; and a pixel; wherein: the pixel comprises: an organic light-emitting diode; a semiconductor layer; a first thin film transistor electrically connected to the organic light-emitting diode and the first voltage line; a second thin film transistor electrically connected to the first thin film transistor and the first scanning line; a third thin film transistor electrically connected to the second thin film transistor and the second voltage line, and electrically connected to the second scanning line; and a fourth thin film transistor electrically connected to the third thin film transistor and the second voltage line; the first thin film transistor, the second thin film transistor, the third thin film transistor, and the fourth thin film transistor are connected by the semiconductor layer; the semiconductor layer is overlapped by the second scanning line in at least three portions; and the second thin film transistor has two gate electrodes, which are a portion of the first scanning line and a portion protruding from the first scanning line, and overlap the semiconductor layer, wherein: a contact hole is defined in at least one insulating layer between the semiconductor layer and the second voltage line; the contact hole is between the third thin film transistor and the fourth thin transistor in a plan view; and the third thin film transistor and the fourth thin film transistor are connected to the second voltage line through the contact hole.
Interconnections, e.g. scanning lines · CPC title
having a particular composition, shape or crystalline structure of the active layer · CPC title
wherein the TFTs are in active matrices · CPC title
Anodes · CPC title
Connection of the pixel electrodes to the thin film transistors [TFT] · CPC title
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