Systems and methods for use of capacitive member to prevent chip fraud

US11989607B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11989607-B2
Application numberUS-202217852019-A
CountryUS
Kind codeB2
Filing dateJun 28, 2022
Priority dateDec 20, 2019
Publication dateMay 21, 2024
Grant dateMay 21, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Example embodiments of systems and methods for preventing chip fraud are provided. A chip fraud prevention system may comprise a device including a chip, wherein the chip is at least partially encompassed in a chip pocket. One or more connections may be communicatively coupled to one or more surfaces of the chip, and a capacitance member may be coupled to a surface of the chip. The capacitance member may comprise a known capacitance value and the chip may comprise a memory containing an applet, wherein the applet is configured to measure the capacitance value of the capacitance member.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of preventing chip fraud, the method comprising the steps of: positioning a chip at least partially within a substrate, the chip comprising a memory storing an applet; coupling a capacitance member to a surface of the chip, wherein the capacitance member comprises a capacitance value; detecting, by the applet, the capacitance value of the capacitance member; and issuing, by the applet, a fraud alert upon detecting a change in the capacitance value greater than a predetermined amount, wherein the substrate comprises a chip pocket, the chip is disposed in the chip pocket, the capacitance member is positioned in the chip pocket and beneath the chip, the chip pocket comprises one or more peaks and one or more valleys, the capacitance member is coupled to the surface of the chip through one or more connections, and the one or more connections are disposed within adhesives that completely or partially fill air gaps between the one or more peaks and one or more valleys. 2. The method of claim 1 , further comprising: detecting, by the applet, an initial capacitance value of the capacitance member; and periodically detecting, by the applet, the capacitance value of the capacitance member. 3. The method of claim 2 , further comprising comparing, by the applet, a detected capacitance value of the capacitance member to the initial capacitance value to measure a change in the capacitance value. 4. The method of claim 1 , wherein the capacitance member comprises a first end in data communication with the chip. 5. The method of claim 4 , wherein the first end is configured to apply a force to the surface of the chip. 6. The method of claim 1 , wherein: the chip is positioned at least partially within the chip pocket, and the surface of the chip to which the capacitance member is coupled is within the chip pocket. 7. The method of claim 6 , wherein: the capacitance member is positioned between at least one selected from the group of the one or more peaks and the one or more valleys. 8. The method of claim 7 , wherein the one or more peaks and one or more valleys comprise a saw tooth milling pattern. 9. A device, comprising: a chip comprising a memory storing an applet; and a capacitance member coupled to a surface of the chip, the capacitance member comprises a capacitance value, wherein the applet is configured to detect the capacitance value, wherein the applet is configured to issue a fraud alert upon detecting a change in the capacitance value greater than a predetermined amount, and wherein the substrate comprises a chip pocket, the chip is disposed in the chip pocket, the capacitance member is positioned in the chip pocket and beneath the chip, the chip pocket comprises one or more peaks and one or more valleys, the capacitance member is coupled to the surface of the chip through one or more connections, and the one or more connections are disposed within adhesives that completely or partially fill air gaps between the one or more peaks and one or more valleys. 10. The device of claim 9 , wherein the device comprises a vehicle. 11. The device of claim 9 , wherein the device comprises an appliance. 12. The device of claim 9 , wherein the device comprises at least one selected from the group of a card, a computing device, a mobile device, and a wearable device. 13. A card, comprising: a chip comprising a memory storing an applet; and a capacitance member coupled to a surface of the chip, the capacitance member comprises a capacitance value, wherein the applet is configured to detect the capacitance value, wherein the applet is configured to issue a fraud alert upon detecting a change in the capacitance value greater than a predetermined amount, and wherein the substrate comprises a chip pocket, the chip is disposed in the chip pocket, the capacitance member is positioned in the chip pocket and beneath the chip, the chip pocket comprises one or more peaks and one or more valleys, the capacitance member is coupled to the surface of the chip through one or more connections, and the one or more connections are disposed within adhesives that completely or partially fill air gaps between the one or more peaks and one or more valleys. 14. The card of claim 13 , wherein the applet is further configured to: detect an initial capacitance value of the capacitance member, periodically detect the capacitance value of the capacitance member, and compare a detected capacitance value of the capacitance member to the initial capacitance value to measure a change in the capacitance value. 15. The card of claim 13 , wherein the capacitance member comprises at least one selected from the group of a wire, a spring, and a coil. 16. The card of claim 13 , wherein the capacitance member comprises at least one selected from the group of a particle and a flake. 17. The card of claim 13 , wherein the capacitance member comprises at least one selected from the group of a plate and a disc. 18. The card of claim 13 , wherein the capacitance member comprises a cube. 19. The device of claim 9 , wherein the applet is further configured to measure the capacitance value prior to the performance of a transaction. 20. The device of claim 19 , wherien, if the applet is unable to measure the capacitance value, the applet is further configured to deny the transaction.

Assignees

Inventors

Classifications

  • protecting against tampering, e.g. unauthorised inspection or reverse engineering · CPC title

  • by hindering electromagnetic reading or writing (jamming of communication, counter-measures H04K3/00; secret communication H04K1/00) · CPC title

  • Electricity · mapped topic

  • G06K19/073Primary

    Special arrangements for circuits, e.g. for protecting identification code in memory (protection against unauthorised use of computer memory G06F12/14) · CPC title

  • by detecting tampering with the circuit · CPC title

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Frequently asked questions

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What does patent US11989607B2 cover?
Example embodiments of systems and methods for preventing chip fraud are provided. A chip fraud prevention system may comprise a device including a chip, wherein the chip is at least partially encompassed in a chip pocket. One or more connections may be communicatively coupled to one or more surfaces of the chip, and a capacitance member may be coupled to a surface of the chip. The capacitance …
Who is the assignee on this patent?
Capital One Services Llc
What technology area does this patent fall under?
Primary CPC classification G06K19/07318. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 21 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).