Vibration rectification error correction circuit, physical quantity sensor module, structure monitoring device, and correction value adjustment method of vibration rectification error correction circuit
US-2019331491-A1 · Oct 31, 2019 · US
US11988685B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11988685-B2 |
| Application number | US-202117562054-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 27, 2021 |
| Priority date | Dec 28, 2020 |
| Publication date | May 21, 2024 |
| Grant date | May 21, 2024 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A vibration rectification error correction device includes a reference signal generation circuit that outputs a reference signal, a first frequency delta-sigma modulation circuit that performs frequency delta-sigma modulation on the reference signal by using a first measured signal to generate a first frequency delta-sigma modulated signal, a first filter, a second filter that operates in synchronization with the reference signal, and a first timing control circuit that controls a timing of outputting an input signal in synchronization with the first timing signal, in which the first filter and the first timing control circuit are provided on a signal path from an output of the first frequency delta-sigma modulation circuit to an input of the second filter.
Opening claim text (preview).
What is claimed is: 1. A vibration rectification error correction device comprising: a reference signal generation circuit configured to output a reference signal; a first frequency delta-sigma modulation circuit configured to perform frequency delta-sigma modulation on the reference signal by using a first measured signal to generate a first frequency delta-sigma modulated signal; a first timing control circuit configured to: receive the first frequency delta-sigma modulated signal, the reference signal, and the first measured signal; generate a first timing signal based on a reference count value of the number of pulses of the reference signal; and control a timing of outputting a first count value as an output signal in synchronization with the first timing signal; a first filter configured to: receive the first count value as the output signal of the first timing control circuit; and filter the first count value in synchronization with the first timing signal to generate a second count value as an output signal of the first filter; a latch circuit configured to: latch the second count value as the output signal from the first filter; and hold the latched second count value as a third count value; and a second filter configured to: receive the third count value as an output signal of the latch circuit; and filter the third count value in synchronization with the reference signal to generate a fourth count value as an output signal of the second filter. 2. The vibration rectification error correction device according to claim 1 , further comprising: a memory configured to store information for controlling a delay amount of the first timing signal. 3. The vibration rectification error correction device according to claim 1 , further comprising: a second timing control circuit configured to: receive the first frequency delta-sigma modulated signal; generate a second timing signal obtained by delaying the first measured signal based on the count value of the number of pulses of the reference signal; and control a timing of outputting another first count value as an output signal in synchronization with the second timing signal; and a third filter configured to: receive the another first count value as the output signal of the second timing control circuit; and filter the another first count value in synchronization with the second timing signal to generate another second count value as an output signal of the third filter, wherein the second filter is further configured to: receive the another second count value as the output signal of the third filter; and filter the third count value and the another second count value in synchronization with the reference signal to generate the fourth count value as the output signal of the second filter, a first vibration rectification error and a second vibration rectification error have different polarities, wherein the first vibration rectification error is included in the output signal from the second filter when the third count value is input to the second filter, and the second vibration rectification error is included in the output signal from the second filter when the another second count value is input to the second filter. 4. The vibration rectification error correction device according to claim 1 , wherein a third signal is generated based on a first signal having a first group delay amount based on the output signal of the second filter and a second signal having a second group delay amount different from the first group delay amount based on the output signal of the second filter, and a first vibration rectification error included in the first signal and a second vibration rectification error included in the second signal have different polarities. 5. The vibration rectification error correction device according to claim 1 , wherein the vibration rectification error correction device has a first operation mode for measuring a frequency ratio of the first measured signal and the reference signal, and a second operation mode in which a cutoff frequency of the second filter is lower than that in the first operation mode. 6. The vibration rectification error correction device according to claim 1 , further comprising: a second frequency delta-sigma modulation circuit configured to perform the frequency delta-sigma modulation on the reference signal by using a second measured signal to generate a second frequency delta-sigma modulated signal; a fourth filter configured to operate in synchronization with the second measured signal; a fifth filter configured to operate in synchronization with the reference signal; and a third timing control circuit configured to generate a third timing signal obtained by delaying the second measured signal based on the count value of the number of pulses of the reference signal and control a timing of outputting an input signal in synchronization with the third timing signal, wherein the fourth filter and the third timing control circuit are provided on a signal path from an output of the second frequency delta-sigma modulation circuit to an input of the fifth filter. 7. A sensor module comprising: the vibration rectification error correction device according to claim 1 ; and a first physical quantity sensor, wherein the first measured signal is a signal based on an output signal of the first physical quantity sensor. 8. A sensor module comprising: the vibration rectification error correction device according to claim 6 ; a first physical quantity sensor; and a second physical quantity sensor, wherein the first measured signal is a signal based on an output signal of the first physical quantity sensor, and the second measured signal is a signal based on an output signal of the second physical quantity sensor. 9. A vibration rectification error correction method comprising: performing frequency delta-sigma modulation on a reference signal by using a measured signal to generate a frequency delta-sigma modulated signal; receiving the frequency delta-sigma modulated signal, the reference signal, and the measured signal to generate a timing signal based on a count value of the number of pulses of the reference signal; controlling a timing of outputting a first count value as a first output signal in synchronization with the timing signal; receiving the first count value as the first output signal, and filtering the first count value in synchronization with the timing signal to generate a second count value as a second output signal; latching the second count value as the second output signal, and holding the latched second count value as a third count value; and receiving the third count value as a third output signal, and filtering the third count value in synchronization with the reference signal to generate a fourth count value as a fourth output signal.
Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration · CPC title
Testing or calibrating of apparatus or devices covered by the preceding groups · CPC title
by vibratory strings · CPC title
in two or more dimensions · CPC title
by converting frequency into a train of pulses, which are then counted {, i.e. converting the signal into a square wave} · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.