Two-dimensional content-adaptive compensation to mitigate display voltage drop

US11978385B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11978385-B2
Application numberUS-202217889242-A
CountryUS
Kind codeB2
Filing dateAug 16, 2022
Priority dateSep 22, 2021
Publication dateMay 7, 2024
Grant dateMay 7, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

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This disclosure provides various techniques for providing fine-grain digital and analog pixel compensation to account for voltage error across an electronic display. By employing a two-dimensional digital compensation and a local analog compensation, a fine-grain and robust pixel compensation scheme may be provided to the electronic display.

First claim

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The invention claimed is: 1. A pixel voltage compensation method, comprising: determining a two-dimensional voltage error map of voltage supplied to display pixels of an electronic display based at least in part on image data to be displayed on the electronic display; subtracting a baseline voltage error that is to be corrected using an analog voltage compensation in the electronic display, wherein the baseline voltage error is subtracted from the two-dimensional voltage error map to obtain a residual two-dimensional voltage error map; adjusting the image data digitally to compensate for voltage error represented by the residual two-dimensional voltage error map to obtain compensated image data; and displaying the compensated image data on the electronic display while correcting for the baseline voltage error in the electronic display using the analog voltage compensation. 2. The pixel voltage compensation method of claim 1 , wherein determining the two-dimensional voltage error map comprises: determining an expected average pixel luminance of the display pixels; determining, via a plurality of lookup tables, an expected per-zone voltage error across the electronic display; and determining a plurality of per-zone voltage error maps based on the expected average pixel luminance, the expected per-zone voltage error, or both. 3. The pixel voltage compensation method of claim 2 , wherein the expected average pixel luminance is determined based on the image data, a global display brightness value setting, or both. 4. The pixel voltage compensation method of claim 2 , wherein the expected average pixel luminance is determined based at least in part on an emission profile of the electronic display. 5. The pixel voltage compensation method of claim 1 , wherein the two-dimensional voltage error map corresponds to a positive voltage supply drop or a negative voltage supply rise, or a combination thereof. 6. The pixel voltage compensation method of claim 1 , wherein the analog voltage compensation comprises a global voltage error correction. 7. The pixel voltage compensation method of claim 1 , wherein the analog voltage compensation comprises a local voltage error correction that varies in at least one dimension. 8. The pixel voltage compensation method of claim 1 , wherein the image data is adjusted in processing circuitry separate from display driver circuitry of the electronic display. 9. An electronic display, comprising: a display panel comprising a plurality of pixels; a plurality of column-driver integrated circuits (CDICs) coupled to the display panel, wherein a first CDIC of the plurality of CDICs is configured to determine a first supply voltage at a first location corresponding to a first column of the display panel, and to determine a second supply voltage at a second location corresponding to a second column of the display panel different than the first column; and compensation circuitry configured to: determine a voltage error gradient between a first voltage error at the first location on the display panel and a second voltage error at the second location on the display panel; and apply a compensation to the plurality of pixels based on their respective positions between the first location and the second location to compensate for the voltage error gradient. 10. The electronic display of claim 9 , wherein the compensation circuitry comprises: a difference amplifier configured determine the voltage error gradient based on a voltage differential between the first supply voltage and the second supply voltage; an analog-to-digital converter configured to determine a gray level adjustment corresponding to the voltage error gradient; and adder circuitry configured to add the gray level adjustment to image data to be displayed on the display panel. 11. The electronic display of claim 9 , wherein the compensation circuitry comprises: a voltage ladder configured to determine the voltage error gradient in part by determining a plurality of error voltages between the first location and the second location; and voltage-to-current converter circuitry configured to convert the plurality of error voltages from the voltage ladder to a plurality of error currents, and provide the error currents to a plurality of source amplifiers, wherein the source amplifiers are configured to output a compensation voltage based on the plurality of error currents. 12. The electronic display of claim 9 , wherein the compensation comprises a local analog voltage compensation. 13. An electronic device comprising: an electronic display configured to display image data, wherein displaying the image data comprises performing an analog compensation to compensate for a supply voltage error that varies across the electronic display; and processing circuitry configured to generate the image data, wherein generating the image data comprises performing a digital compensation to compensate for a residual supply voltage error that remains despite the analog compensation. 14. The electronic device of claim 13 , wherein the electronic display is configured to perform the analog compensation at least in part by determining a gray level adjustment to the image data associated with part of the supply voltage error. 15. The electronic device of claim 13 , wherein the electronic display is configured to perform the analog compensation at least in part by adjusting an operation of different source amplifiers of the electronic display corresponding to different positions in a column driver integrated circuit (CDIC). 16. The electronic device of claim 13 , wherein the processing circuitry is configured to perform the digital compensation based at least in part on an expected effect of an average pixel luminance of the image data on the supply voltage error that is not fully accounted for by the analog compensation. 17. The electronic device of claim 16 , wherein the processing circuitry is configured to determine the expected effect of the average pixel luminance based at least in part on a two-dimensional lookup table that relates two-dimensional voltage error and the average pixel luminance in different zones of the electronic display. 18. The electronic device of claim 17 , wherein the two-dimensional lookup table is symmetrical across the electronic display, wherein only a first half of the two-dimensional lookup table is stored in memory and a second half of the two-dimensional lookup table is obtained based on the first half. 19. The electronic device of claim 17 , wherein the two-dimensional lookup table relates to supply voltage error due to a positive voltage supply droop, due to a negative voltage supply rise, or both. 20. The electronic device of claim 17 , wherein: the electronic display is configured to measure supply voltage at a plurality of locations; and the processing circuitry is configured to use the measurements to at least partially determine the two-dimensional lookup table.

Assignees

Inventors

Classifications

  • G09G3/2096Primary

    Details of the interface to the display terminal specific for a flat panel (suitable for both CRT and flat panel G09G5/006; specific for a CRT G09G1/167) · CPC title

  • Display of intermediate tones · CPC title

  • Details of output amplifiers or buffers arranged for use in a driving circuit · CPC title

  • Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes · CPC title

  • Improving the luminance or brightness uniformity across the screen · CPC title

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What does patent US11978385B2 cover?
This disclosure provides various techniques for providing fine-grain digital and analog pixel compensation to account for voltage error across an electronic display. By employing a two-dimensional digital compensation and a local analog compensation, a fine-grain and robust pixel compensation scheme may be provided to the electronic display.
Who is the assignee on this patent?
Apple Inc
What technology area does this patent fall under?
Primary CPC classification G09G3/2096. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 07 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 10 related publications on this page (citations in our corpus or others sharing the same primary CPC).