Indicating a type of secure boot to endpoint devices by a security processor

Patent metadata

Field	Value
Publication number	US-11977639-B2
Application number	US-202117372587-A
Country	US
Kind code	B2
Filing date	Jul 12, 2021
Priority date	Jul 12, 2021
Publication date	May 7, 2024
Grant date	May 7, 2024

Abstract

Embodiments of systems and methods for indicating a type of secure boot to endpoint devices by a security processor are described. In some embodiments, a security processor may include: a core and a memory coupled to the core, the memory having program instructions stored thereon that, upon execution by the core, cause the security processor to: identify a type of secure boot last performed to bootstrap an Information Handling System (IHS); and make an indication of the type of secure boot available to a host processor or Baseboard Management Controller (BMC) of the IHS.

First claim

The invention claimed is:

1. A security processor of an Information Handling System (IHS), comprising:
a core; and
a memory coupled to the core, the memory having program instructions stored thereon that, upon execution by the core, cause the security processor to:
identify a type of secure boot last performed to bootstrap the IHS; and
make an indication of the type of secure boot last performed to bootstrap the IHS available to a host processor or Baseboard Management Controller (BMC) of the IHS,
wherein the indication of the type of secure boot last performed to bootstrap the IHS is based, at least in part on a first counter value of a first counter and a second counter value of a second counter, and the indication usable by a peripheral device to determine whether to allow a selected operation;
and wherein to identify the type of secure boot last performed to bootstrap the IHS, the program instructions, upon execution, further cause the security processor to read values of the first counter and the second counter, the first counter configured to be incremented upon eviction of a first entity and the second counter configured to be incremented upon eviction of a second entity.

2. The security processor of claim 1 , wherein to identify the type of secure boot last used to bootstrap the IHS, the program instructions, upon execution by the core, cause the security processor to identify a type of entity associated with a secure boot public key used to initiate the bootstrap.

3. The security processor of claim 2 , wherein the type of entity is selected from a group consisting of: an Original Equipment Manufacturing (OEM), and a customer or brand of the OEM.

4. The security processor of claim 1 , wherein the first entity is associated with an OEM entity and the second entity is associated a customer or brand, and
wherein the eviction of the OEM entity is associated with shipment of the security processor to the customer or brand.

5. The security processor of claim 1 , wherein the second entity is associated a customer or brand, and
wherein the eviction of the customer or brand is associated with a return, service, or warranty claim.

6. The security processor of claim 1 , wherein the values of the first and second counters are usable by the security processor to identify a currently usable one of a plurality of secure boot public keys.

7. The security processor of claim 3 , wherein the program instructions, upon execution by the core, cause the security processor to make an indication of at least one of: (i) a number of times the security processor has been shipped to different customers or brands, (ii) a number of times the security processor has been returned to an OEM, or (iii) a number of times the security processor has been reprovisioned, available to the host processor or BMC.

8. The security processor of claim 2 , wherein the type of secure boot excludes access to selected one or more controllers.

9. The security processor of claim 8 , wherein a first type of secure boot excludes access to at least one of: Universal Serial Bus (USB) controller, a network controller, or a storage controller, and wherein a second type of secure boot excludes access to a fuse controller.

10. The security processor of claim 2 , wherein the secure boot public key is fused into the security processor.

11. The security processor of claim 2 , wherein the indication is made available through a read-only register.

12. The security processor of claim 1 , wherein the peripheral device comprises a storage controller, and wherein the selected operation comprises use of cryptographic keys.

13. A memory storage device having program instructions stored thereon that, upon execution by an Information Handling System (IHS), cause the IHS to:
receive, by a host processor or a Baseboard Management Controller (BMC) of the IHS from a security processor of the IHS, an indication of a type of secure boot last performed to bootstrap the IHS,
wherein the indication of the type of secure boot last performed is based, at least in part based on a first counter value of a first counter and a second counter value of a second counter, and
wherein the first counter is incremented upon eviction of a first entity and the second counter is incremented upon eviction of a second entity; and
make, by the host processor or the BMC of the IHS, the indication of the type of secure boot last performed to bootstrap the IHS available to a peripheral device,
wherein the indication of the type of secure boot last performed to bootstrap the IHS is usable by the peripheral device to determine whether to allow a selected operation.

14. The memory storage device of claim 13 , wherein the peripheral device uses the indication of the type of secure boot last performed to determine whether to allow the selected operation.

15. The memory storage device of claim 14 , wherein the peripheral device comprises a storage controller, and wherein the selected operation comprises use of cryptographic keys.

16. A method, comprising:
receiving, by a peripheral device from a host processor or a Baseboard Management Controller (BMC) of an Information Handling System (IHS), an indication of a type of secure boot last performed to bootstrap the IHS,
wherein the indication is based, at least in part based on a first counter value of a first counter and a second counter value of a second counter, and
wherein the first counter is incremented upon eviction of a first entity and the second counter is incremented upon eviction of a second entity; and
using, by the peripheral device, the indication of the type of secure boot last performed to bootstrap the IHS to determine whether to allow a selected operation.

17. The method of claim 16 , wherein the indication is made available by a security processor coupled to the IHS.

18. The method of claim 16 , wherein the peripheral device comprises a storage controller, and wherein the selected operation comprises use of cryptographic keys.

Assignees

• Dell Products Lp

Inventors

• Khatri Mukund P
• Cho Eugene David

Classifications

• G06F21/575 Primary

  Secure boot · CPC title

• G06F21/31

  User authentication · CPC title

• G06F21/602

  Providing cryptographic facilities or services · CPC title

• G06Q30/012 Primary

  Providing warranty services · CPC title

• G06F21/107

  License processing; Key processing · CPC title