Gateway system with multiple modes of operation in a fleet management system
US-11709500-B2 · Jul 25, 2023 · US
US11977427B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11977427-B2 |
| Application number | US-202217893440-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 23, 2022 |
| Priority date | Aug 25, 2021 |
| Publication date | May 7, 2024 |
| Grant date | May 7, 2024 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A method for handling power faults in a primary electronic device is provided. The method includes setting a power-off duration to an initial value and powering on a hardware interface. In response to detecting a power fault at the hardware interface, the hardware interface is power-cycled by a plurality of power cycles having progressively increasing power-off durations until a limit is reached. A primary electronic device for carrying out the method is also provided. The primary electronic device includes a controller, a memory, and a hardware interface for coupling the telematics device to a secondary electronic device.
Opening claim text (preview).
The invention claimed is: 1. A method by a primary electronic device, the method for handling power faults on a secondary electronic device coupled to the primary electronic device via a hardware interface of the primary electronic device, the method comprising: detecting a power fault condition on the hardware interface; power-cycling the hardware interface by a plurality of power cycles having a plurality of progressively increasing power-off durations; after each power cycle of the plurality of power cycles, checking the power fault condition; and permanently powering off the hardware interface when the power fault condition is detected and a current power-off duration of the plurality of progressively increasing power-off durations has reached a power-off duration limit. 2. The method of claim 1 , wherein powering off the hardware interface comprises setting, in a persistent storage of the primary electronic device, an indication that the hardware interface has been powered off due to a power fault. 3. The method of claim 2 , further comprising clearing the indication that the hardware interface has been powered off due to the power fault condition in response to detecting that the secondary electronic device has been unplugged from the hardware interface. 4. The method of claim 2 , further comprising checking the indication in the persistent storage upon powering up of the primary electronic device and refraining from powering up the hardware interface in response to determining that the hardware interface has been powered off due to the power fault condition. 5. The method of claim 1 , wherein detecting the power fault condition comprises detecting by a power protection module of the hardware interface one of: an overcurrent condition, an overvoltage condition, and a reverse current condition. 6. The method of claim 1 , wherein detecting the power fault condition on the hardware interface comprises receiving an indication from a power protection module of the power fault condition. 7. The method of claim 6 , wherein receiving the indication from the power protection module comprises receiving a signal change on a pin or receiving an interrupt signal. 8. A primary electronic device, comprising: a controller; a hardware interface coupled to the controller, the hardware interface for coupling the primary electronic device to a secondary electronic device; a memory, coupled to the controller, the memory for storing machine-executable programming instructions which, when executed by the controller, configure the primary electronic device to: in response to detecting a power fault condition on the hardware interface: power-cycle the hardware interface by a plurality of power cycles having progressively increasing power-off durations; after each power cycle of the plurality of power cycles, check the power fault condition; and permanently power off the hardware interface when the power fault condition is detected and a current power-off duration of the progressively increasing power-off durations has reached a power-off duration limit. 9. The primary electronic device of claim 8 , wherein the machine-executable programming instructions which configure the primary electronic device to power off the hardware interface comprise machine-executable programming instructions which configure the primary electronic device to set an indication in a persistent storage thereof that the hardware interface has been powered off due to a power fault. 10. The primary electronic device of claim 9 , wherein the machine-executable programming instructions further comprise machine-executable programming instructions which configure the primary electronic device to clear the indication that the hardware interface has been powered off due to the power fault condition in response to detecting that the secondary electronic device has been unplugged from the hardware interface. 11. The primary electronic device of claim 9 , wherein the machine-executable programming instructions further comprise machine-executable programming instructions which configure the primary electronic device to check the indication in the persistent storage upon powering up of the primary electronic device and refrain from powering up the hardware interface in response to determining that the hardware interface has been powered off due to the power fault condition. 12. The primary electronic device of claim 8 , wherein the machine-executable programming instructions which configure the primary electronic device to detect the power fault condition comprise machine-executable programming instructions which configure the primary electronic device to detect one of: an overcurrent condition, an overvoltage condition, and a reverse current condition. 13. The primary electronic device of claim 8 , wherein the machine-executable programming instructions which configure the primary electronic device to progressively increase the progressively increasing power-off durations comprise machine-executable programming instructions which configure the primary electronic device to increase the current power-off duration between two successive power cycles. 14. The primary electronic device of claim 8 , wherein the machine-executable programming instructions which configure the primary electronic device to detect the power fault condition on the hardware interface comprise machine-executable programming instructions which configure the primary electronic device to receive an indication, from a power protection module of the hardware interface, of the power fault condition. 15. The primary electronic device of claim 14 , wherein the machine-executable programming instructions which configure the primary electronic device to receive the indication from the power protection module comprise machine-executable programming instructions which configure the primary electronic device to receive one of: a signal change on a pin or an interrupt signal. 16. A non-transitory computer-readable medium, storing machine-executable programming instructions which, when executed by a controller, configure a primary electronic device to: in response to detecting a power fault condition on a hardware interface: power-cycle the hardware interface by a plurality of power cycles having progressively increasing power-off durations; after each power cycle of the plurality of power cycles, check the power fault condition; and permanently power off the hardware interface when the power fault condition is detected and a current power-off duration of the progressively increasing power-off durations has reached a power-off duration limit. 17. The non-transitory computer-readable medium of claim 16 , wherein the machine-executable programming instructions which configure the primary electronic device to power off the hardware interface comprise machine-executable programming instructions which configure the primary electronic device to set an indication in a persistent storage thereof that the hardware interface has been powered off due to a power fault. 18. The non-transitory computer-readable medium of claim 17 , wherein the machine-executable programming instructions further comprise machine-executable programming instructions which configure the primary electronic device to clear the indication that the hardware interface has been powered off due to the power fault condition in response to detecting that a secondary electronic device has been unplugged from the hardware interface. 19. The non-transitory computer-readable medium o
Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations (for resetting only G06F1/24) · CPC title
Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips · CPC title
Remedial or corrective actions (recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40) · CPC title
where the computing system component is an input/output interface (interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units G06F13/00) · CPC title
where the monitored property is the power consumption (power management in a computing system G06F1/3203) · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.