Sculpted micromirror in a digital micromirror device

US11977220B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11977220-B2
Application numberUS-202017111309-A
CountryUS
Kind codeB2
Filing dateDec 3, 2020
Priority dateJun 3, 2020
Publication dateMay 7, 2024
Grant dateMay 7, 2024

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A digital micromirror device comprises an array of micromirror pixels, the array comprising a first micromirror pixel and a second micromirror pixel. The first micromirror pixel comprises a hinge, where the hinge is configured to tilt toward a first raised address electrode and toward a second raised address electrode. The first micromirror pixel also comprises a first micromirror coupled to the hinge, where the first micromirror has a sculpted edge. The second micromirror pixel comprises a second micromirror, where a first gap between a first point on the sculpted edge and a nearest point to the first point on the second micromirror is larger than a second gap between a second point on the sculpted edge and a nearest point to the second point on the second micromirror.

First claim

Opening claim text (preview).

What is claimed is: 1. A system, comprising: a digital micromirror device (DMD) comprising an array of micromirror pixels comprising a first micromirror pixel and a second micromirror pixel, the first micromirror pixel comprising: a hinge, wherein the hinge is configured to tilt toward a first raised address electrode and toward a second raised address electrode; and a first micromirror coupled to the hinge, wherein the first micromirror has a sculpted edge; and the second micromirror pixel comprising a second micromirror, wherein a first gap between the sculpted edge and the second micromirror is larger than a second gap between the sculpted edge and the second micromirror while the first micromirror is in a flat state and the second micromirror is in a flat state. 2. The system of claim 1 , wherein the sculpted edge is a first sculpted edge, and wherein a second sculpted edge of the first micromirror is opposite and parallel to the first sculpted edge. 3. The system of claim 2 , wherein the first micromirror has a third edge and a fourth edge that are each perpendicular to the first sculpted edge and the second sculpted edge, wherein the third edge has a first uniform gap between the third edge and a fourth micromirror, and wherein the fourth edge has a second uniform gap between the fourth edge and a fifth micromirror. 4. The system of claim 2 , wherein the first micromirror includes a third edge and a fourth edge perpendicular to the first sculpted edge and the second sculpted edge, and wherein the third edge and the fourth edge are sculpted. 5. The system of claim 1 , wherein the sculpted edge includes a tapered section at each end of the sculpted edge and a straight section at a center of the sculpted edge, wherein the straight section is perpendicular to a third edge and a fourth edge of the first micromirror. 6. The system of claim 5 , wherein each tapered section is tapered at an angle between approximately 0.5 and 4.0 degrees. 7. The system of claim 1 , wherein the sculpted edge is a first sculpted edge, and wherein the second micromirror has a second sculpted edge, wherein the first sculpted edge and the second sculpted edge are adjacent. 8. The system of claim 1 , wherein the first micromirror is in a first reset group, and the second micromirror is in a second reset group. 9. The system of claim 1 , wherein the first micromirror has a pixel pitch between 7.00 and 8.00 micrometers, and the first gap is between approximately 0.30 and 0.80 micrometers. 10. The system of claim 1 , further comprising: a complementary metal-oxide-semiconductor (CMOS) memory cell coupled to a first address pad and to a second address pad; a first raised address electrode coupled to the first address pad, and a second raised address electrode coupled to the second address pad; and a reset bus coupled to the hinge. 11. A system, comprising: a digital micromirror device (DMD) comprising: an array of micromirrors comprising a first micromirror and a second micromirror, wherein the first micromirror is in a first reset group and the second micromirror is in a second reset group, wherein the first micromirror has a first sculpted edge, the second micromirror has a second sculpted edge, the first sculpted edge facing the second sculpted edge, wherein the first sculpted edge and the second sculpted edge are configured to create a first gap and a second gap between the first micromirror and the second micromirror, and wherein the first gap is larger than the second gap; and a reset bus, wherein the reset bus is configured to provide a micromirror clocking pulse to the first reset group. 12. The system of claim 11 , wherein the first gap occurs at a center of the first sculpted edge, and the second gap occurs at an end of the first sculpted edge. 13. The system of claim 11 , further comprising: a projection lens; and a light source configured to project light onto the DMD, wherein the DMD is configured to reflect the light to the projection lens. 14. The system of claim 11 , wherein the first micromirror is a rectangular micromirror having four sculpted edges. 15. The system of claim 11 , wherein the first sculpted edge includes a tapered section at each end of the first sculpted edge and a straight section at a center of the first sculpted edge, wherein the straight section is perpendicular to a third edge and a fourth edge of the first micromirror. 16. A method, comprising: storing data in a complementary metal-oxide-semiconductor (CMOS) memory cell coupled to a micromirror pixel in a digital micromirror device (DMD), where the micromirror pixel comprises a first micromirror; receiving a micromirror clocking pulse at the first micromirror via a reset bus, wherein the first micromirror has a first sculpted edge; and landing the first micromirror in a first state, the first state based on the data stored in the CMOS memory cell, wherein landing the first micromirror comprises landing the first sculpted edge facing a second sculpted edge of a second micromirror, wherein: the first sculpted edge and the second sculpted edge are configured to provide a first gap and a second gap between the first micromirror and the second micromirror, wherein the first gap is larger than the second gap. 17. The method of claim 16 , wherein the first micromirror is in a first reset group and the second micromirror is in a second reset group. 18. The method of claim 16 , wherein the first gap occurs at a center of the first sculpted edge, and the second gap occurs at an end of the first sculpted edge. 19. The method of claim 16 , wherein the first sculpted edge includes a tapered section at each end of the first sculpted edge and a straight section at a center of the first sculpted edge, wherein the straight section is perpendicular to a third edge and a fourth edge of the first micromirror. 20. The method of claim 19 , wherein each tapered section is tapered at an angle between 0.5 and 4.0 degrees.

Assignees

Inventors

Classifications

  • the reflecting element being a micromechanical device, e.g. a MEMS mirror, DMD (G02B26/0825 takes precedence; micromechanical devices in general B81B) · CPC title

  • Adjusting the distance between two elements, at least one of them being movable, e.g. air-gap tuning · CPC title

  • Constitution or structural means for improving mechanical properties not provided for in B81B3/007 - B81B3/0075 · CPC title

  • Electrical characteristics, e.g. reducing driving voltage, improving resistance to peak voltage · CPC title

  • Protection against electrostatic discharge (circuit arrangements for protecting electronic switching circuits used for pulse technique against overcurrent or overvoltage H03K17/08; electrostatic discharge protection for electronic semiconductor circuits H10D89/60) · CPC title

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What does patent US11977220B2 cover?
A digital micromirror device comprises an array of micromirror pixels, the array comprising a first micromirror pixel and a second micromirror pixel. The first micromirror pixel comprises a hinge, where the hinge is configured to tilt toward a first raised address electrode and toward a second raised address electrode. The first micromirror pixel also comprises a first micromirror coupled to th…
Who is the assignee on this patent?
Texas Instruments Inc
What technology area does this patent fall under?
Primary CPC classification G02B26/0833. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 07 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).