Signal processing circuit

Patent metadata

Field	Value
Publication number	US-11973477-B2
Application number	US-202117392544-A
Country	US
Kind code	B2
Filing date	Aug 3, 2021
Priority date	Sep 24, 2020
Publication date	Apr 30, 2024
Grant date	Apr 30, 2024

Abstract

According to one embodiment, a signal processing circuit includes a first voltage setting circuit that sets a reference voltage on an input side of an isolator, a variable gain amplifier circuit that amplifies an output signal of the isolator, a DC offset adjustment circuit that adjusts an offset of the variable gain amplifier circuit, a second voltage setting circuit that sets a reference voltage on an output side of the isolator, and a control circuit that controls the DC offset adjustment circuit in response to a result of comparison of an output voltage of the variable gain amplifier circuit with an output voltage of the second voltage setting circuit.

First claim

What is claimed is:

1. A signal processing circuit, comprising:
an isolator with an input side and an output side that are electrically insulated;
a first voltage setting circuit that is provided on the input side of the isolator and outputs a reference voltage on the input side of the isolator to the input side of the isolator;
a variable gain amplifier circuit that amplifies an output signal of the isolator;
a DC offset adjustment circuit that adjusts an offset of the variable gain amplifier circuit;
a second voltage setting circuit that sets a reference voltage on the output side of the isolator;
a comparison circuit that compares an output voltage of the variable gain amplifier circuit with an output voltage of the second voltage setting circuit; and
a control circuit that controls the DC offset adjustment circuit in response to an output signal of the comparison circuit.

2. The signal processing circuit according to claim 1 , wherein
the first voltage setting circuit includes:
a first differential amplifier circuit that has an inverting input terminal and an non-inverting input terminal;
a first current source that supplies a current to the inverting input terminal and the non-inverting input terminal of the first differential amplifier circuit; and
a first switch that is provided between the inverting input terminal and the non-inverting input terminal of the first differential amplifier circuit,

the second voltage setting circuit includes:
a second differential amplifier circuit that has an inverting input terminal and an non-inverting input terminal;
a second current source that supplies a current to the inverting input terminal and the non-inverting input terminal of the second differential amplifier circuit; and
a second switch that is provided between the inverting input terminal and the non-inverting input terminal of the second differential amplifier circuit, and

the control circuit controls the DC offset adjustment circuit depending on an output signal from the comparison circuit at a time when the first switch and the second switch are provided in on-states thereof.

3. The signal processing circuit according to claim 2 , wherein
an output voltage of the first voltage setting circuit and an output voltage of the second voltage setting circuit are set at equal values.

4. The signal processing circuit according to claim 2 , wherein
the first differential amplifier circuit and the second differential amplifier circuit are fully-differential amplifier circuits.

5. The signal processing circuit according to claim 2 , comprising
a gain adjustment circuit that adjusts a gain of the variable gain amplifier circuit, wherein
the control circuit controls the gain adjustment circuit depending on an output signal from the comparison circuit at a time when the first switch and the second switch are turned off.

6. The signal processing circuit according to claim 5 , wherein
the variable gain amplifier circuit includes:
a third amplifier circuit with a DC offset that is adjusted by the DC offset adjustment circuit; and
a fourth amplifier circuit with a gain that is adjusted by the gain adjustment circuit.

7. The signal processing circuit according to claim 5 , wherein
the control circuit controls the gain adjustment circuit in such a manner that an output voltage of the variable gain amplifier circuit is equal to the output voltage of the second voltage setting circuit, in response to the output signal of the comparison circuit.

8. The signal processing circuit according to claim 1 , wherein
the DC offset adjustment circuit includes a variable current source with a current value that is changed depending on a control signal from the control circuit, and
the variable gain amplifier circuit includes a differential amplifier circuit with an input terminal that is supplied with a current from the variable current source.

9. The signal processing circuit according to claim 1 , wherein
the first voltage setting circuit includes:
a first transistor with a main current path that is connected to a constant current source in series;
a voltage/current conversion circuit that converts a voltage that is generated on the main current path of the first transistor into a current; and
a differential amplifier circuit with an input terminal that is supplied with an output current from the voltage/current conversion circuit.

10. The signal processing circuit according to claim 9 , comprising
a second transistor that is provided with a main current path that is connected to the main current path of the first transistor in parallel and supplies an output current to a load; and
a switch that switches a connection point of an input terminal of the voltage/current conversion circuit between a drain of the first transistor and a drain of the second transistor.

11. The signal processing circuit according to claim 10 , further comprising
a third transistor with a main current path that is connected between the drain of the second transistor and the load.

12. The signal processing circuit according to claim 11 , wherein
the third transistor is composed of a GaN transistor.

13. A signal processing circuit, comprising:
an isolator with an input side and an output side that are electrically insulated;
a first voltage setting circuit that is provided on the input side of the isolator and outputs a reference voltage on the input side of the isolator to the input side of the isolator;
a variable gain amplifier circuit that amplifies an output signal of the isolator;
a DC offset adjustment circuit that adjusts an offset of the variable gain amplifier circuit;
a second voltage setting circuit that sets a reference voltage on the output side of the isolator;
a comparison circuit that compares an output voltage of the variable gain amplifier circuit with an output voltage of the second voltage setting circuit; and
a control circuit that controls the DC offset adjustment circuit in response to an output signal of the comparison circuit, wherein
the first voltage setting circuit includes:
a first transistor with a main current path that is connected to a constant current source in series;
a voltage/current conversion circuit that converts a voltage that is generated on the main current path of the first transistor into a current; and
a differential amplifier circuit with an input terminal that is supplied with an output current from the voltage/current conversion circuit.

14. The signal processing circuit according to claim 13 , comprising
a second transistor that is provided with a main current path that is connected to the main current path of the first transistor in parallel and supplies an output current to a load; and
a switch that switches a connection point of an input terminal of the voltage/current conversion circuit between a drain of the first transistor and a drain of the second transistor.

15. The signal processing circuit according to claim 13 , further comprising
a gain adjustment circuit that adjusts a gain of the variable gain amplifier circuit, wherein
the control circuit controls the gain adjustment circuit depending on an output signal from the comparison circuit in a state where the switch is connected to a side of a drain of the first transistor.

16. The signal processing circuit according to claim 13 , wherein
an output voltage of the first voltage setting circuit and an output voltage of the second voltage setting circuit are set at equal values.

17. The signal processing circuit according to claim 13 , w

Assignees

• Toshiba Kk
• Toshiba Electronic Devices & Storage Corp

Inventors

• Majima Hideaki

Classifications

• H03F3/45475 Primary

  using IC blocks as the active amplifying circuit · CPC title

• H01P1/36

  Isolators · CPC title

• H03G3/30

  in amplifiers having semiconductor devices · CPC title

• H03K5/24 Primary

  the characteristic being amplitude · CPC title

• H03F2200/375

  Circuitry to compensate the offset being present in an amplifier · CPC title