Display panel and display device with particular arrangement of spacers in a photoelectric sensing region

US11966124B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11966124-B2
Application numberUS-202017417424-A
CountryUS
Kind codeB2
Filing dateDec 30, 2020
Priority dateMar 31, 2020
Publication dateApr 23, 2024
Grant dateApr 23, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

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A display panel includes a display region and a photoelectric sensing region which includes a light transmitting region and a frame region surrounding the light transmitting region; the frame region includes a first region surrounding the light transmitting region, a second region on a side of the first region away from the light transmitting region and surrounding the first region, and a third region between the second region and the display region. The spacers are in an array and in the display region but not in the light transmitting region. A plurality of first support pillars are in the first region, arranged around the light transmitting region, and spaced from each other. A plurality of second support pillars are in the second region, around the second region, and spaced from each other. A plurality of third support pillars are in the third region in an array.

First claim

Opening claim text (preview).

What is claimed is: 1. A display panel comprising: a display region and a photoelectric sensing region, wherein the display region is located outside the photoelectric sensing region, the display region comprises a plurality of pixels arranged in an array, each pixel of the plurality of the pixels comprises a plurality of color sub-pixels; and the photoelectric sensing region comprises a light transmitting region and a frame area that surrounds the light transmitting region, wherein the frame region comprises: a first region surrounding the light transmitting region; a second region located on a side of the first region away from the light transmitting region and surrounding the first region; and a third region located on a side of a second region away from the light transmitting region and located between the second region and the display region to separate the second region from the display region; a plurality of spacers arranged in an array, wherein the plurality of the spacers is located inside the display region while outside of the light transmitting region; a plurality of first support pillars located inside the first region, arranged around the light transmitting region, and spaced away from each other; a plurality of second support pillars located inside the second region, arranged around the second region, and spaced away from each other; and a plurality of third support pillars located in the third region and arranged in an array, wherein the third region is a non-display region, and an arrangement density and an arrangement form of the plurality of third support pillars arranged in the array in the third region are same as the arrangement density and the arrangement form of the plurality of spacers arranged in the array inside the display region. 2. The display panel according to claim 1 , wherein a planar arrangement pattern of the plurality of the first support pillars comprises at least a ring, or the planar arrangement pattern of the plurality of the first support pillars comprises a plurality of concentric rings; along radial directions of the concentric rings, the first support pillars in the plurality of the concentric rings are aligned with each other, or the first support pillars in adjacent concentric rings of the plurality of the concentric rings are staggered to each other. 3. The display panel according to claim 2 , wherein a ratio of a total area of the orthographic projections of the plurality of the first support pillars on the first substrate to a total area of the orthographic projections of the plurality of the second support pillars on the first substrate is from 5 to 10. 4. A display panel comprising: a display region and a photoelectric sensing region, wherein the display region is located outside the photoelectric sensing region, the display region comprises a plurality of pixels arranged in an array, each pixel of the plurality of the pixels comprises a plurality of color sub-pixels; and the photoelectric sensing region comprises a light transmitting region and a frame area that surrounds the light transmitting region, wherein the frame region comprises: a first region surrounding the light transmitting region; a second region located on a side of the first region away from the light transmitting region and surrounding the first region; and a third region located on a side of a second region away from the light transmitting region and located between the second region and the display region to separate the second region from the display region; a plurality of spacers arranged in an array, wherein the plurality of the spacers is located inside the display region while outside of the light transmitting region; a plurality of first support pillars located inside the first region, arranged around the light transmitting region, and spaced away from each other; a plurality of second support pillars located inside the second region, arranged around the second region, and spaced away from each other; and a plurality of third support pillars located in the third region and arranged in an array, wherein the display panel further comprises: a first substrate; a second substrate opposite to the first substrate; a black matrix located on a side of the second substrate adjacent to the first substrate, covering the frame area, and defining the plurality of the color sub-pixels in the display region, wherein orthographic projections of the plurality of the spacers, orthographic projections of the plurality of the first support pillars, orthographic projections of the plurality of the second support pillars, and orthographic projections of the plurality of the third support pillars on the first substrate are located within an orthographic projection of the black matrix on the first substrate; and a protection layer located in the second substrate adjacent to and located on a side of the black matrix adjacent to the first substrate, covering the frame region and the display region, wherein the plurality of the spacers, the plurality of the first support pillars, the plurality of the second support pillars, and the plurality of the third support pillars are located between the first substrate and the protection layer to maintain a distance between the first substrate and the second substrate. 5. The display panel according to claim 4 , further comprising: a first spacer layer located in the second region and located between the black matrix and the protection layer, and the orthographic projections of the plurality of the second support pillars are located within an orthographic project of the first spacer layer on the first substrate. 6. The display panel according to claim 4 , further comprising: a buffer layer located on a side of the first substrate adjacent to the second substrate and directly contacted with the first substrate; and a driving circuit layer located on a side of the buffer layer away from the first substrate and between the display region and the frame area, wherein the plurality of the spacers, the plurality of the first support pillars, the plurality of the second support pillars, and the plurality of the third support pillars are all located between the driving circuit layer and the protection layer, the driving circuit layer is not disposed in the light transmitting region, and an edge of the driving circuit layer adjacent to the light transmitting region is in the first region or on a border between the light transmitting region and the first region. 7. The display panel according to claim 6 , wherein in the light transmitting region, a first liquid crystal layer is disposed between the buffer layer and the second substrate, and the first liquid crystal layer in in direct contact with the buffer layer; in the frame region and the display region, a second liquid crystal layer is disposed between the protection layer and the driving circuit layer, a liquid crystal in the first liquid crystal layer is in communication with a liquid crystal in the second liquid crystal layer through gaps among the plurality of the first support pillars, gaps among the plurality of the second support pillar, and gaps among the plurality of the third support pillars. 8. The display panel according to claim 6 , wherein no liquid crystal is disposed in the light transmitting region; in the light transmitting region, a gap between the second substrate and the buffer layer is filled with air; the display panel comprises a first sealant, and the first sealant is located between the second substrate and the buffer layer, surrounds the light transmitting region, and is in direct contact with the buffer layer and the protection layer. 9. A display device comprising the display panel according

Assignees

Inventors

Classifications

  • OLEDs integrated with inorganic image sensors · CPC title

  • comprising light absorbing layers, e.g. black layers · CPC title

  • Vertical spacers, e.g. arranged between the sealing arrangement and the OLED · CPC title

  • spacers regularly patterned on the cell subtrate, e.g. walls, pillars (G02F1/133377 takes precedence) · CPC title

  • Spacers having different sizes · CPC title

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What does patent US11966124B2 cover?
A display panel includes a display region and a photoelectric sensing region which includes a light transmitting region and a frame region surrounding the light transmitting region; the frame region includes a first region surrounding the light transmitting region, a second region on a side of the first region away from the light transmitting region and surrounding the first region, and a third…
Who is the assignee on this patent?
Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification G02F1/13394. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 23 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).