Display, display panel, and electronic terminal

US11963405B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11963405-B2
Application numberUS-202117144545-A
CountryUS
Kind codeB2
Filing dateJan 8, 2021
Priority dateJan 28, 2019
Publication dateApr 16, 2024
Grant dateApr 16, 2024

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display and a display panel are provided. An additional VDD wire is arranged in an irregular-shaped region. The VDD wire is connected to a pixel arranged in the irregular-shaped region through a plurality of connection wires, such that the display may have a narrow side edge, and at the same time, a difference between impedances of the irregular-shaped region and a regular-shaped display region may not be large, and a display region may not be split.

First claim

Opening claim text (preview).

What is claimed is: 1. A display panel, comprising: an irregular-shaped region; a plurality of pixels, arranged in an array in the irregular-shaped region; and a non-display region, arranged around a periphery of the irregular-shaped region, wherein a plurality of data lines, one VDD wire, and a plurality of connection wires are arranged in the non-display region, each of the plurality of data lines is electrically connected to at least one of the plurality of pixels correspondingly, and the VDD wire is electrically connected to the plurality of pixels correspondingly through the plurality of connection wires, wherein the irregular-shaped region comprises a data wiring region, the plurality of data lines are arranged in the data wiring region, the VDD wire is arranged at an outer periphery of the data wiring region, and the plurality of connection wires are configured to cross over the data wiring region and insulated from the plurality of data lines. 2. The display panel according to claim 1 , wherein orthographic projections of the plurality of connection wires onto the display panel are located within the data wiring region. 3. The display panel according to claim 1 , wherein the VDD wire is configured to extend along an edge of the irregular-shaped region, and a shape of an edge of the data wiring region is the same as the shape of the edge of the irregular-shaped region. 4. The display panel according to claim 1 , wherein the display panel comprises an array substrate, the array substrate comprises a stack of a plurality of layers, and the plurality of connection wires and the VDD wire are arranged in different layers of the array substrate. 5. The display panel according to claim 1 , wherein the display panel further comprises a straight-edged region, another VDD wire is arranged in the straight-edged region, and the VDD wire arranged in the irregular-shaped region is electrically connected to the VDD wire arranged in the straight-edged region. 6. The display panel according to claim 1 , wherein the display panel is a flexible display panel. 7. A display, comprising a driving circuit and the display panel according to claim 1 , wherein the driving circuit is electrically coupled to a data line and the VDD wire of the display panel. 8. The display according to claim 7 , wherein the display panel comprises an array substrate, the array substrate comprises a stack of a plurality of layers, and the plurality of connection wires and the VDD wire are arranged in different layers of the array substrate. 9. The display according to claim 7 , wherein the display panel further comprises a first electrostatic protection assembly and a second electrostatic protection assembly, the first electrostatic protection assembly is connected to the VDD wire, an orthographic projection of the second electrostatic protection assembly onto the display panel is at least partially overlapped with an orthographic projection of the first electrostatic protection assembly, a second insulation layer is arranged between the first and the second electrostatic protection assemblies, such that the first and the second electrostatic protection assemblies are coupled to each other to form a capacitor. 10. An electronic terminal, comprising a driving circuit and the display panel according to claim 1 , wherein the driving circuit is electrically coupled to a data line and the VDD wire of the display panel; and the display panel further comprises a first electrostatic protection assembly and a second electrostatic protection assembly, the first electrostatic protection assembly is connected to the VDD wire, an orthographic projection of the second electrostatic protection assembly onto the display panel is at least partially overlapped with an orthographic projection of the first electrostatic protection assembly, an insulation layer is arranged between the first and the second electrostatic protection assemblies. 11. A display panel, comprising: an irregular-shaped region; a plurality of pixels, arranged in an array in the irregular-shaped region; and a non-display region, arranged around a periphery of the irregular-shaped region, wherein a plurality of data lines, one VDD wire, and a plurality of connection wires are arranged in the non-display region, each of the plurality of data lines is electrically connected to at least one of the plurality of pixels correspondingly, and the VDD wire is electrically connected to the plurality of pixels correspondingly through the plurality of connection wires, wherein the display panel comprises an array substrate, the array substrate comprises a stack of a plurality of layers, and the plurality of connection wires and the VDD wire are arranged in different layers of the array substrate, and wherein the VDD wire and the plurality of data lines are arranged in a same layer of the array substrate, and a first insulation layer is arranged between a layer of the plurality of connection wires and a layer of the plurality of data lines. 12. The display panel according to claim 11 , wherein the first insulation layer defines a through hole, the VDD wire is exposed through the through hole, a portion of the plurality of connection wires is received in the through hole to electrically connect to the VDD wire. 13. The display panel according to claim 11 , wherein the plurality of connection wires are arranged in a same layer. 14. The display panel according to claim 11 , wherein the plurality of connection wires and a source electrode of a driving transistor of the plurality of pixels are arranged in a same layer of the array substrate and are made of same material. 15. A display, comprising a driving circuit and the display panel according to claim 11 , wherein the plurality of data lines are arranged in a data wiring region, the VDD wire is arranged at an outer periphery of the data wiring region, and the plurality of connection wires are arranged to cross over the data wiring region and are insulated from the plurality of data lines. 16. A display panel, comprising: an irregular-shaped region; a plurality of pixels, arranged in an array in the irregular-shaped region; and a non-display region, arranged around a periphery of the irregular-shaped region, wherein a plurality of data lines, one VDD wire, and a plurality of connection wires are arranged in the non-display region, each of the plurality of data lines is electrically connected to at least one of the plurality of pixels correspondingly, and the VDD wire is electrically connected to the plurality of pixels correspondingly through the plurality of connection wires, wherein the display panel further comprises a first electrostatic protection assembly and a second electrostatic protection assembly, the first electrostatic protection assembly is connected to the VDD wire, an orthographic projection of the second electrostatic protection assembly onto the display panel is at least partially overlapped with an orthographic projection of the first electrostatic protection assembly onto the display panel, and a second insulation layer is arranged between the first and the second electrostatic protection assemblies, such that the first and the second electrostatic protection assemblies are coupled to each other to form a capacitor. 17. The display panel according to claim 16 , wherein the first electrostatic protection assembly and the VDD wire are arranged in a same layer. 18. The display panel according to claim 16 , wherein the second electrostatic protection assembly and the plurality of connect

Assignees

Inventors

Classifications

  • characterised by the dispositions of the protective arrangements · CPC title

  • characterised by the configuration of the interconnections connecting the protective arrangements, e.g. ESD buses · CPC title

  • using passive elements as protective elements · CPC title

  • H10K59/131Primary

    Interconnections, e.g. wiring lines or terminals · CPC title

  • Electricity · mapped topic

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Frequently asked questions

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What does patent US11963405B2 cover?
A display and a display panel are provided. An additional VDD wire is arranged in an irregular-shaped region. The VDD wire is connected to a pixel arranged in the irregular-shaped region through a plurality of connection wires, such that the display may have a narrow side edge, and at the same time, a difference between impedances of the irregular-shaped region and a regular-shaped display regi…
Who is the assignee on this patent?
Kunshan Govisionox Optoelectronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10K59/131. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 16 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).