Precision oscillators that use imprecise components

Patent metadata

Field	Value
Publication number	US-11949417-B2
Application number	US-202217838029-A
Country	US
Kind code	B2
Filing date	Jun 10, 2022
Priority date	Dec 22, 2017
Publication date	Apr 2, 2024
Grant date	Apr 2, 2024

Abstract

Trimming components within an oscillator comprising: a trim-capable current source, wherein the trim-capable current source comprises a trimmable resistor and a trimmable current component, a comparator comprising a first input terminal that couples to the trim-capable current source and the second input terminal that couples to a reference voltage source, a switch coupled to the first input terminal and the trim-capable current source, and a trim-capable capacitor coupled to the switch, wherein the switch is coupled between the trim-capable capacitor and the trim-capable current source.

First claim

What is claimed is:

1. An oscillator comprising:
a trimmable capacitor;
a trimmable current source coupled to the trimmable capacitor, wherein the trimmable current source includes:
a first trimmable resistor and a second trimmable resistor, and wherein the first trimmable resistor and the second trimmable resistor each include: a fixed resistor; a plurality of resistors; and a first plurality of switches, each of the first plurality of switches is coupled to a respective one of the plurality of resistors; and
a bias circuit coupled to a trim control, wherein the bias circuit includes a first portion current coupled to the first trimmable resistor and a second portion current coupled to the second trimmable resistor;

a comparator coupled to the trimmable current source, the comparator including a comparator output; and
a data storage element coupled to the comparator output, the data storage element including one of a flip-flop and a latch;
wherein the bias circuit includes:
a plurality of transistors coupled in parallel and a second plurality of switches, and wherein each of the second plurality of switches is coupled to a respective drain of the plurality of transistors.

2. The oscillator of claim 1 , wherein:
the comparator includes a negative input; and
the negative input is coupled to a voltage reference.

3. The oscillator of claim 1 , wherein:
the trimmable capacitor includes:
a first capacitor;
a first plurality of capacitors coupled in parallel, the first plurality of capacitors coupled to the first capacitor; and
a second plurality of capacitors coupled in parallel, the second plurality of capacitors coupled to the first capacitor.

4. The oscillator of claim 1 , wherein:
the trimmable capacitor is coupled to a first switch and a second switch;
the first switch is coupled to ground; and
the second switch is coupled to the trimmable current source.

5. The oscillator of claim 1 , wherein the trimmable current source includes a trim control coupled to the first trimmable resistor and the second trimmable resistor.

6. The oscillator of claim 1 , wherein the trimmable current source includes a trim system coupled to the bias circuit and the trim control.

7. The oscillator of claim 6 , wherein the trim system includes a current measurement component.

8. An oscillator comprising:
a trimmable capacitor;
a trimmable current source coupled to the trimmable capacitor, wherein the trimmable current source includes:
a first trimmable resistor and a second trimmable resistor, and wherein the first trimmable resistor and the second trimmable resistor each include: a fixed resistor; a plurality of resistors; and a plurality of switches, each of the plurality of switches is coupled to a respective one of the plurality of resistors; and
a bias circuit coupled to a trim control, wherein the bias circuit includes a first portion current coupled to the first trimmable resistor and a second portion current coupled to the second trimmable resistor;

a comparator coupled to the trimmable current source, the comparator including a comparator output and
a data storage element coupled to the comparator output, the data storage element including one of a flip-flop and a latch, wherein the trimmable current source includes:
a first amplifier coupled to a first transistor, the first transistor coupled to the second portion current and the second trimmable resistor;
a second amplifier coupled to a second transistor, the second transistor coupled to the second trimmable resistor; and
a third amplifier coupled to a third transistor, the third transistor coupled to the first portion current and the first trimmable resistor.

9. The oscillator of claim 8 , wherein:
the comparator includes a negative input; and
the negative input is coupled to a voltage reference.

10. The oscillator of claim 8 , wherein the trimmable capacitor includes:
a first capacitor;
a first plurality of capacitors coupled in parallel, the first plurality of capacitors coupled to the first capacitor; and
a second plurality of capacitors coupled in parallel, the second plurality of capacitors coupled to the first capacitor.

11. The oscillator of claim 8 , wherein:
the trimmable capacitor is coupled to a first switch and a second switch;
the first switch is coupled to ground; and
the second switch is coupled to the trimmable current source.

12. The oscillator of claim 8 , wherein the trimmable current source includes a trim system coupled to the bias circuit and the trim control.

13. The oscillator of claim 12 , wherein the trim system includes a current measurement component.

14. An oscillator including a current source, the current source comprising:
a bias circuit including a first current;
a first trimmable resistor and a second trimmable resistor coupled to the bias circuit;
a trim system configured to measure the first current and determine an offset based on the first current; and
a trim control coupled to the trim system and the first trimmable resistor and the second trimmable resistor, the trim control configured to trim the first trimmable resistor based on the offset;
wherein the first trimmable resistor and the second trimmable resistor each include: a fixed resistor; a plurality of resistors; and a first plurality of switches, each of the first plurality of switches is coupled to a respective one of the plurality of resistors;
wherein the bias circuit is coupled to the trim control, further wherein the bias circuit includes the first current coupled to the first trimmable resistor and a second current coupled to the second trimmable resistor and wherein the bias circuit further includes: a plurality of transistors coupled in parallel and a second plurality of switches, and wherein each of the second plurality of switches is coupled to a respective drain of the plurality of transistors.

15. The oscillator of claim 14 , wherein the first current is configured to be adjusted by setting the second plurality of switches to an open or a closed state in response to a code.

16. The oscillator of claim 14 , wherein the second current is configured to be adjusted by setting the second plurality of switches to an open or a closed state in response to a code.

17. The oscillator of claim 14 , further comprising:
a first amplifier coupled to a first transistor, the first transistor coupled to the second current and the second trimmable resistor;
a second amplifier coupled to a second transistor, the second transistor coupled to the second trimmable resistor; and
a third amplifier coupled to a third transistor, the third transistor coupled to the first current and the first trimmable resistor.

18. The oscillator of claim 14 , wherein the trim system includes a current measurement component configured to measure the first current at a first test pin in response to the trim control closing a current mirror switch in the bias circuit.

Assignees

• Texas Instruments Inc

Inventors

• Roy Aniruddha
• Agarwal Nitin
• Thinakaran Rajavelu

Classifications

• H03K4/502 Primary

  the capacitor being charged from a constant-current source · CPC title

• G05F3/262

  using field-effect transistors only · CPC title

• G05F3/245

  producing a voltage or current as a predetermined function of the temperature · CPC title

• G05F1/567

  for temperature compensation · CPC title

• H03K3/0231 Primary

  Astable circuits {(H03K3/0315 takes precedence)} · CPC title