Dual path split-capacitor power converter

Patent metadata

Field	Value
Publication number	US-11949331-B2
Application number	US-202117559305-A
Country	US
Kind code	B2
Filing date	Dec 22, 2021
Priority date	Dec 22, 2021
Publication date	Apr 2, 2024
Grant date	Apr 2, 2024

Abstract

The present document describes a power converter configured to convert electrical power at an input voltage at an input of the power converter to electrical power at an output voltage at an output of the power converter. The power converter comprises a first upper capacitor and a first lower capacitor, which are coupled with one another via a first mid node; a second upper capacitor and a second lower capacitor, which are coupled with one another via a second mid node; an inductor; and a set of power switches. In addition, the power converter comprises a control unit which is configured to control the set of power switches such that during an operation cycle the power converter is operated in a first main state and in a second main state in a mutually exclusive manner.

First claim

What is claimed is:

1. A power converter configured to convert electrical power at an input voltage at an input of the power converter to electrical power at an output voltage at an output of the power converter; wherein the power converter comprises,
a first upper capacitor and a first lower capacitor, which are coupled with one another via a first mid node;
a second upper capacitor and a second lower capacitor, which are coupled with one another via a second mid node;
an inductor;
a set of power switches; and
a control unit configured to control the set of power switches such that during an operation cycle the power converter is operated in a first main state and in a second main state in a mutually exclusive manner;
wherein within the first main state, the power converter exhibits
a first current path from ground through the first lower capacitor, through the inductor to the output; and
a second current path with
1) A sub-path from the input, through the second upper capacitor, through the second lower capacitor to the output, and
2) a sub-path from ground through the first lower capacitor, through the first upper capacitor, through the second lower capacitor to the output; and

wherein within the second main state, the power converter exhibits
a first current path from ground, through the second lower capacitor, through the inductor to the output; and
a second current path with
1) A sub-path from the input, through the first upper capacitor, through the first lower capacitor to the output, and
2) A sub-path from ground, through the second lower capacitor, through the second upper capacitor, through the first lower capacitor to the output.

2. The power converter of claim 1 , wherein
the control unit is configured to control the set of power switches during a sequence of subsequent operation cycles; and
each operation cycle comprises a first main state and a second main state.

3. The power converter of claim 1 , wherein the control unit is configured to control the set of power switches such that
the first main state and the second main state are repeated in an alternating manner; and/or
a duty cycle and/or duration of the first main state is equal to a duty cycle and/or duration of the second main state.

4. The power converter of claim 1 , wherein
the control unit is configured to control the set of power switches such that during an operation cycle the power converter is operated in a first valley state and in a second valley state, which in particular lie, individually, in between the first main state and the second main state and/or in between the second main state and the first main state;
within the first valley state, the power converter exhibits
a first current path from ground through the inductor to the output; and
a second current path from the input through the first upper capacitor, through the first lower capacitor to the output; and

within the second valley state, the power converter exhibits
a first current path from ground through the inductor to the output; and
a second current path from the input through the second upper capacitor, through the second lower capacitor to the output.

5. The power converter of claim 1 , wherein
the control unit is configured to control the set of power switches such that during an operation cycle the power converter is operated in a first peak state and in a second peak state, which in particular lie, individually, in between the first main state and the second main state and/or in between the second main state and the first main state;
within the first peak state, the power converter exhibits
a first current path from the input, through the first upper capacitor, through the inductor to the output; and
a second current path from the input through the first upper capacitor, through the first lower capacitor to the output; and

within the second peak state, the power converter exhibits
a first current path from the input, through the second upper capacitor, through the inductor to the output; and
a second current path from the input through the second upper capacitor, through the second lower capacitor to the output.

6. The power converter of claim 5 , wherein
within the first peak state, the second current path exhibits a further sub-path from ground, through the second lower capacitor, through the second upper capacitor, through the first lower capacitor to the output; and
within the second peak state, the second current path exhibits a further sub-path from ground, through the first lower capacitor, through the first upper capacitor, through the second lower capacitor to the output.

7. The power converter of claim 1 , wherein the control unit is configured to
determine a target conversion ratio between the input voltage and the output voltage; and
select different states for the operation cycle of the power converter in dependence of the target conversion ratio.

8. The power converter of claim 7 , wherein the control unit is configured to
use a state sequence comprising the first main state, followed by a first valley state, followed by the second main state and followed by a second valley state as an operation cycle, if the target conversion ratio lies between 0 and 0.33; and/or
use a state sequence comprising the first main state, followed by a first peak state, followed by the second main state and followed by a second peak state as an operation cycle, if the target conversion ratio lies between 0.33 and 0.5.

9. The power converter of claim 1 , wherein the set of power switches comprises
a first power switch with an input node coupled to the input of the power converter and an output node coupled to an input node of the first upper capacitor and to an input node of a tenth power switch;
a second power switch with an input node coupled to the first mid node and an output node coupled to an input node of the inductor;
a third power switch with an input node coupled to an output node of the first lower capacitor and with an output node coupled to the output of the power converter;
a fourth power switch with an input node coupled to the output node of the first lower capacitor and with an output node coupled to ground;
a fifth power switch with an input node coupled to the input of the power converter and an output node coupled to an input node of the second upper capacitor and to an input node of an eleventh power switch;
a sixth power switch with an input node coupled to the second mid node and an output node coupled to the input node of the inductor;
a seventh power switch with an input node coupled to an output node of the second lower capacitor and with an output node coupled to the output of the power converter;
an eighth power switch with an input node coupled to the output node of the second lower capacitor and with an output node coupled to ground;
a nineth power switch with an input node coupled to the input node of the inductor and with an output node coupled to ground;
the tenth power switch with an output node coupled to the second mid node; and
the eleventh power switch with an output node coupled to the first mid node.

10. The power converter of claim 9 , wherein
an output node of the first upper capacitor is coupled to an input node of the first lower capacitor at the first mid node;
an output node of the second upper capacitor is coupled to an input node of the second lower capacitor at the second mid node; and
an output node of the inductor is coupled to the output of the power converter.

11. The power converter of claim 9 , wherein the set of power switches comprises
a twelfth switch in an anti-serial arrangement with the eleventh switch,

Assignees

• Dialog Semiconductor Uk Ltd

Inventors

• Mercer Mark
• Dowdy Kevin
• Petersen Holger

Classifications

• H02M3/07 Primary

  using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title

• H02M1/0045

  Converters combining the concepts of switch-mode regulation and linear regulation, e.g. linear pre-regulator to switching converter, linear and switching converter in parallel, same converter or same transistor operating either in linear or switching mode · CPC title

• H02M3/072

  adapted to generate an output voltage whose value is lower than the input voltage · CPC title

• H02M1/0095

  Hybrid converter topologies, e.g. NPC mixed with flying capacitor, thyristor converter mixed with MMC or charge pump mixed with buck · CPC title

• H02M3/158 Primary

  including plural semiconductor devices as final control devices for a single load · CPC title