Semiconductor device

Patent metadata

Field	Value
Publication number	US-11948864-B2
Application number	US-202117465565-A
Country	US
Kind code	B2
Filing date	Sep 2, 2021
Priority date	Mar 23, 2021
Publication date	Apr 2, 2024
Grant date	Apr 2, 2024

Abstract

A semiconductor device has a first wiring extending in a first direction on a nitride semiconductor layer. A source electrode is electrically connected to the first wiring and extends in a second direction. A drain electrode extends in the second direction and includes a first and second portion extending in the second direction, spaced from each other in the first direction. An element isolation region is in the second nitride semiconductor layer between the first and second portions. A third portion extends in the second direction on the first and second portions. A gate electrode extends in the second direction on the second nitride semiconductor layer between the source electrode and the drain electrode. The portion includes holes therein aligned with each other along the second direction with the spacing between adjacent holes in the second direction increasing with increasing distance in the second direction from the first wiring.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a first nitride semiconductor layer on a substrate;
a second nitride semiconductor layer on the first nitride semiconductor layer and having a band gap larger than that of the first nitride semiconductor layer;
a first wiring on the second nitride semiconductor layer and extending in a first direction;
a first source electrode on the second nitride semiconductor layer, electrically connected to the first wiring, and extending in a second direction intersecting the first direction;
a first drain electrode extending in the second direction and including:
a first drain wiring extending in the second direction on the second nitride semiconductor layer,
a second drain wiring extending in the second direction on the second nitride semiconductor layer, spaced from the first drain wiring in the first direction,
a first element isolation region in the second nitride semiconductor layer between positions of the first drain wiring and the second drain wiring, and
a third drain wiring extending in the second direction on the first drain wiring and the second drain wiring; and

a first gate electrode extending in the second direction on the second nitride semiconductor layer between the first source electrode and the first drain electrode in the first direction, wherein
the third drain wiring includes a plurality of holes therein aligned with each other along the second direction with spacing between adjacent holes in the second direction increasing with increasing distance in the second direction from the first wiring.

2. The semiconductor device according to claim 1 , wherein the first source electrode comprises:
a first source wiring extending in the second direction;
a second source wiring spaced from the first source wiring in the first direction and extending in the second direction;
a second element isolation region in the second nitride semiconductor layer between positions of the first source wiring and the second source wiring; and
a third source wiring extending in the second direction on the first source wiring and the second source wiring, wherein
the third source wiring includes a plurality of holes therein aligned with each other along the second direction with spacing between adjacent holes in the second direction decreasing with increasing distance in the second direction from the first wiring.

3. The semiconductor device according to claim 2 , wherein the distance between a pair of adjacent holes at an end portion of the third drain wiring is equal to the distance between a pair of adjacent holes at end portion of the third source wiring.

4. The semiconductor device according to claim 2 , further comprising:
a second drain electrode spaced from the first drain electrode in the first direction and including:
a fourth drain wiring on the second nitride semiconductor layer and extending in the second direction;
a fifth drain wiring spaced from the fourth drain wiring in the first direction on the second nitride semiconductor layer and extending in the second direction;
a third element isolation region in the second nitride semiconductor layer between positions of the fourth drain wiring and the fifth drain wiring; and
a sixth drain wiring extending in the second direction on the fourth drain wiring and the fifth drain wiring and, wherein

the sixth drain wiring includes a plurality of holes therein aligned with each other along the second direction with spacing between adjacent holes in the second direction decreasing with increasing distance in the second direction from the first wiring.

5. The semiconductor device according to claim 2 , wherein
a first hole extends through the first source wiring in the first direction at a position along the second direction matching a position of one of the plurality of holes in the third source wiring, and
a second hole extends through the second source wiring in the first direction at the position along the second direction matching the position of the one of the plurality of holes in the third source wiring.

6. The semiconductor device according to claim 2 , wherein
a first hole extends through the first drain wiring in the first direction at a position along the second direction matching a position of one of the plurality of holes in the third drain wiring, and
a second hole extends through the second drain wiring in the first direction at the position along the second direction matching the position of the one of the plurality of holes in the third drain wiring.

7. The semiconductor device according to claim 6 , wherein
a third hole extends through the first source wiring in the first direction at a position along the second direction matching a position of one of the plurality of holes in the third source wiring, and
a fourth hole extends through the second source wiring in the first direction at the position along the second direction matching the position of the one of the plurality of holes in the third source wiring.

8. The semiconductor device according to claim 1 , wherein
a first hole extends through the first drain wiring in the first direction at a position along the second direction matching a position of one of the plurality of holes in the third drain wiring, and
a second hole extends through the second drain wiring in the first direction at the position along the second direction matching the position of the one of the plurality of holes in the third drain wiring.

9. The semiconductor device according to claim 1 , wherein the first gate electrode extends into the second nitride semiconductor layer.

10. The semiconductor device according to claim 1 , wherein the substrate is a silicon substrate.

11. The semiconductor device according to claim 1 , wherein
each of the holes in the plurality of holes in the third drain wiring is the same dimension in the first direction as each other hole in the plurality of holes, and
each of the holes in the plurality of holes in the third drain wiring is the same dimension in the second direction as each other hole in the plurality of holes.

12. A semiconductor device, comprising:
a first nitride semiconductor layer on a substrate;
a second nitride semiconductor layer on the first nitride semiconductor layer and having a band gap larger than that of the first nitride semiconductor layer;
a first wiring on the second nitride semiconductor layer and extending in a first direction;
a first source electrode on the second nitride semiconductor layer, electrically connected to the first wiring, and extending in a second direction intersecting the first direction;
a first drain electrode extending in the second direction and including:
a first drain wiring extending in the second direction on the second nitride semiconductor layer,
a second drain wiring extending in the second direction on the second nitride semiconductor layer, spaced from the first drain wiring in the first direction,
a first element isolation region in the second nitride semiconductor layer between positions of the first drain wiring and the second drain wiring, and
a third drain wiring extending in the second direction on the first drain wiring and the second drain wiring; and

a first gate electrode extending in the second direction on the second nitride semiconductor layer between the first source electrode and the first drain electrode in the first direction, wherein
the third drain wiring includes a plurality of holes therein aligned with each other along the second direction with spacing between adjacent holes in the second direction being the same for each pair of adjacent holes,
the plurality of h

Assignees

• Toshiba Kk
• Toshiba Electronic Devices & Storage Corp

Inventors

• Yoshioka Akira
• Hung Hung
• Isobe Yasuhiro
• Sugiyama Toru
• Kobayashi Hitoshi

Classifications

• H10W20/484 Primary

  Interconnections having extended contours, e.g. pads having mesh shape or interconnections comprising connected parallel stripes · CPC title

• H10D62/8503

  Nitride Group III-V materials, e.g. AlN or GaN · CPC title

• H10D64/257

  for lateral devices wherein the source or drain electrodes are characterised by top-view geometrical layouts, e.g. interdigitated, semi-circular, annular or L-shaped electrodes (source or drain electrodes of TFTs H10D30/673) · CPC title

• H10D62/824

  comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions · CPC title

• H10D30/475 Primary

  having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs · CPC title