Combination scan management for block families of a memory device

US11941277B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11941277-B2
Application numberUS-202318118082-A
CountryUS
Kind codeB2
Filing dateMar 6, 2023
Priority dateNov 20, 2020
Publication dateMar 26, 2024
Grant dateMar 26, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to initiate a scan process on a plurality of block families of the memory device; responsive to determining, based on the scan process, that a first block family of the plurality of block families and a second block family of the plurality of block families meet a combining criterion, merge the first block family and the second block family; and responsive to determining that a terminating condition has been satisfied, terminate the scan process.

First claim

Opening claim text (preview).

What is claimed is: 1. A system comprising: a memory device; and a processing device, operatively coupled to the memory device, the processing device is to perform operations comprising: performing a read operation on a plurality of block families of the memory device; and responsive to determining that a first block family of the plurality of block families and a second block family of the plurality of block families meet a combining criterion, merging the first block family and the second block family, wherein the combining criterion is based on a data state metric reflecting a temporal voltage shift (TVS) of blocks associated with the first block family and the second block family. 2. The system of claim 1 , wherein performing the read operation is responsive to determining that a triggering condition has been satisfied. 3. The system of claim 2 , wherein determining that the triggering condition has been satisfied comprises at least one of: determining that a number of free block family entries within a metadata table is below a threshold; or determining that a predetermined period of time has elapsed since execution of a previous read operation. 4. The system of claim 1 , wherein the plurality of block families are ordered from newest block families to oldest block families. 5. The system of claim 1 , wherein the operations further comprise: updating the combining criterion based on a number of free block family entries within a metadata table, during execution of the read operation, wherein more or less block families are combined based on the updated combining criterion. 6. The system of claim 1 , wherein the operations further comprise: updating voltage offset bin assignments of one or more block families of the plurality of block families. 7. The system of claim 1 , wherein the combining criterion is updated during execution of the read operation. 8. The system of claim 1 , wherein the combining criterion is based on a data state metric of each block family of the plurality of block families. 9. The system of claim 1 , wherein the operations further comprise: determining that a terminating condition has been satisfied, wherein the terminating condition comprises at least one of: determining that a number of free block family entries within a metadata table reached a threshold; determining that the plurality of block families has been scanned; or determining that a number of host-initiated requests received at the memory device during execution of the read operation exceeds a threshold. 10. A method comprising: detecting that a number of free block family entries within a metadata table of a memory device is below a predetermined threshold; performing a read operation on a plurality of block families referenced by the metadata table; and responsive to determining that a first block family of the plurality of block families and a second block family of the plurality of block families meet a combining criterion, merging the first block family and the second block family wherein the combining criterion is based on a data state metric reflecting a temporal voltage shift (TVS) of blocks associated with the first block family and the second block family. 11. The method of claim 10 , wherein merging the first block family and the second block family further comprises: assigning blocks of the second block family to the first block family; and deleting an entry associated with the second block family from the metadata table. 12. The method of claim 10 , wherein merging the first block family and the second block family further comprises: adding, to the metadata table, a metadata item referencing a new block family; assigning blocks of the first block family and blocks of the second block family to the new block family; and deleting entries associated with the first block family and the second block family from the metadata table. 13. The method of claim 10 , wherein the plurality of block families are ordered from newest block families to oldest block families. 14. The method of claim 10 , further comprising: responsive to determining that a terminating condition has been satisfied, terminating the read operation. 15. The method of claim 14 , further comprising: determining that a terminating condition has been satisfied, wherein the terminating condition comprises at least one of: determining that a number of free block families entries within a metadata table reached a threshold; determining that the plurality of block families has been scanned; or determining that a number of host-initiated requests received at the memory device during execution of the read operation exceeds a threshold. 16. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to: performing a read operation on a plurality of block families of a memory device; and responsive to determining that a first block family of the plurality of block families and a second block family of the plurality of block families meet a combining criterion, merge the first block family and the second block family, wherein the combining criterion is based on a data state metric reflecting a temporal voltage shift (TVS) of blocks associated with the first block family and the second block family. 17. The non-transitory computer-readable storage medium of claim 16 , wherein the processing device is to initiate the read operation responsive to determining that a triggering condition has been satisfied. 18. The non-transitory computer-readable storage medium of claim 17 , wherein the triggering condition comprises at least one of: determining that a number of free block family entries within a metadata table is below a threshold; or determining that a predetermined period of time has elapsed since execution of a previous read operation. 19. The non-transitory computer-readable storage medium of claim 16 , wherein the plurality of block families are ordered from newest block families to oldest block families. 20. The non-transitory computer-readable storage medium of claim 16 , wherein the processing device is further to: merge a subset of the plurality of block families into a single block family, responsive to determining that the subset of the plurality of block families meets a combining criterion, the subset of block families comprising two or more block families.

Assignees

Inventors

Classifications

  • G06F3/064Primary

    Management of blocks · CPC title

  • in relation to data integrity, e.g. data losses, bit errors · CPC title

  • Configuration or reconfiguration of storage systems · CPC title

  • Monitoring storage devices or systems · CPC title

  • Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

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What does patent US11941277B2 cover?
An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to initiate a scan process on a plurality of block families of the memory device; responsive to determining, based on the scan process, that a first block family of the plurality of block families and a second block family of the plurality …
Who is the assignee on this patent?
Micron Technology Inc
What technology area does this patent fall under?
Primary CPC classification G06F3/064. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 26 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).