Analog supply generation using low-voltage digital supply
US-11296599-B1 · Apr 5, 2022 · US
US11936293B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11936293-B2 |
| Application number | US-202217807526-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 17, 2022 |
| Priority date | Jun 17, 2022 |
| Publication date | Mar 19, 2024 |
| Grant date | Mar 19, 2024 |
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A regulated charge pump includes a comparator having a first input coupled to an output of the regulated charge pump, a second input configured for receiving a reference voltage, and an output for generating an output voltage representing a difference between a charging current of the regulated charge pump and a load current of a load coupled to the output of the regulated charge pump; a first converter having an input coupled to the output of the comparator, and an output connected to a control bus configured to indicate an adjustment of the charging current in response to the comparator output; and a driving stage having a first input coupled to the control bus, and an output for providing the charging current, wherein the output of the driving stage comprises the output of the regulated charge pump.
Opening claim text (preview).
What is claimed is: 1. A regulated charge pump comprising: a comparator having a first input and a second input for receiving a reference voltage; a clock generator having an input coupled to an output of the comparator; a first open-loop charge pump in a first feedback path having an input coupled to a first output of the clock generator, and an output coupled to the first input of the comparator; and a second open-loop charge pump in a second feedback path having an input coupled to a second output of the clock generator, and an output coupled to the first input of the comparator, wherein the output of the first open-loop charge pump and the output of the second open-loop charge pump comprises an output of the regulated charge pump, and wherein the first output of the clock generator is configured for providing a first clock signal having a first frequency, and wherein the second output of the clock generator is configured for providing a second clock signal having a second frequency different from the first frequency. 2. The regulated charge pump of claim 1 , further comprising a counter interposed between the second output of the clock generator and the input of the second open-loop charge pump. 3. The regulated charge pump of claim 1 , further comprising a plurality of toggle flip-flops interposed between an output of the counter and the input of the second open-loop charge pump. 4. The regulated charge pump of claim 1 , wherein the second open-loop charge pump comprises a plurality of individually selectable open-loop charge pumps. 5. The regulated charge pump of claim 1 , further comprising a voltage converter interposed between the output of the first open-loop charge pump and the first input of the comparator. 6. The regulated charge pump of claim 1 , further comprising a voltage generator coupled to the first input of the comparator. 7. The regulated charge pump of claim 2 , further comprising a logic gate having a first input coupled to the output of the counter, a second input coupled to the output of the comparator, and an output coupled to a boost input of the comparator. 8. The regulated charge pump of claim 7 , wherein the boost input of the comparator is configured for changing a bias current of the comparator. 9. The regulated charge pump of claim 7 , further comprising a delay element interposed between the output of the comparator and the second input of the logic gate. 10. The regulated charge pump of claim 7 , wherein the logic gate comprises an OR gate. 11. An integrated circuit comprising: a control interface coupled to a first plurality of integrated circuit pins; a plurality of level shifters coupled to the control interface; a plurality of radio frequency (RF) switches respectively coupled between the plurality of level shifters and a second plurality of integrated circuit pins; and at least one regulated charge pump coupled to the plurality of level shifters, wherein the at least one regulated charge pump comprises the regulated charge pump of claim 1 . 12. A method comprising: comparing a charge pump output voltage to a reference voltage to generate an enable signal; generating a first clock signal and a second clock signal in response to the enable signal; generating the charge pump output voltage with a first charge pump responsive to the first clock signal; counting a number of periods of the second clock signal; and boosting a driving strength of the first charge pump with a second charge pump, wherein a number of pumping stages of the second charge pump are enabled according to the number of periods that are counted. 13. The method of claim 12 , further comprising generating a boost signal during a boost mode of operation of the second charge pump. 14. The method of claim 13 , further comprising generating the boost signal when the enable signal is high or low for a time period greater than a predetermined delay time period. 15. The method of claim 13 , wherein the boost signal increases a speed of comparing the charge pump output voltage to the reference voltage to generate the enable signal. 16. The method of claim 13 , wherein the boost signal increases a frequency of at least one of the first clock signal and the second clock signal. 17. A regulated charge pump comprising: a comparator having a first input and a second input for receiving a reference voltage; a clock generator having an input coupled to an output of the comparator; a first open-loop charge pump in a first feedback path having an input coupled to a first output of the clock generator, and an output coupled to the second input of the comparator; a second open-loop charge pump in a second feedback path having an input coupled to a second output of the clock generator, and an output coupled to the second input of the comparator, wherein the output of the first open-loop charge pump and the output of the second open-loop charge pump comprises an output of the regulated charge pump; and a counter interposed between the second output of the clock generator and the input of the second open-loop charge pump. 18. The regulated charge pump of claim 17 , wherein the second open-loop charge pump comprises a plurality of individually selectable open-loop charge pumps.
using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title
the characteristic being amplitude · CPC title
characterised by logic function, e.g. AND, OR, NOR, NOT circuits (H03K19/003 - H03K19/01 take precedence) · CPC title
Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title
with parallel connected charge pump stages · CPC title
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