Sensor output digitizer

US11933648B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11933648-B2
Application numberUS-202117345778-A
CountryUS
Kind codeB2
Filing dateJun 11, 2021
Priority dateApr 14, 2021
Publication dateMar 19, 2024
Grant dateMar 19, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

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The described technology is generally directed towards a sensor output digitizer. The sensor output digitizer can comprise a multiplexer stage, a multi-stage analog to digital converter, and a digital output combiner. The multiplexer stage can be configured to sequentially select sensor outputs from one or more sensors, resulting in a stream of selected sensor outputs. The multi-stage analog to digital converter can be coupled with the multiplexer stage, and can be configured to convert the stream of selected sensor outputs into a stream of digitized outputs. The digital output combiner can be configured to re-scale and sum intermediate outputs of the multi-stage analog to digital converter to produce a stream of digitized sensor outputs.

First claim

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What is claimed is: 1. A sensor output digitizer, comprising: a multiplexer stage configured to sequentially select sensor outputs from one or more sensors, resulting in a stream of selected sensor outputs; a multi-stage analog to digital converter coupled with the multiplexer stage and configured to convert the stream of selected sensor outputs into a stream of digitized outputs, wherein the multi-stage analog to digital converter comprises: a first stage comprising a sigma delta analog to digital converter, wherein the first stage converts the stream of selected sensor outputs into a first intermediate output and a second intermediate output; and a second stage comprising a second analog to digital converter, wherein the second stage is coupled with the first intermediate output and converts the first intermediate output into a third intermediate output while the first stage continues to convert the stream of selected sensor outputs; and a digital output combiner configured to re-scale and sum the second intermediate output and the third intermediate output to produce the stream of digitized sensor outputs. 2. The sensor output digitizer of claim 1 , wherein the multiplexer stage comprises a multiplexer that sequentially selects the sensor outputs. 3. The sensor output digitizer of claim 2 , wherein the multiplexer sequentially selects the sensor outputs according to a round-robin selection sequence. 4. The sensor output digitizer of claim 2 , wherein the multiplexer stage further comprises a resettable amplifier coupled with the multiplexer, wherein the resettable amplifier is configured to reset upon selection of a sensor output. 5. The sensor output digitizer of claim 4 , wherein the multiplexer stage further comprises a demodulator coupled between the resettable amplifier and the multi-stage analog to digital converter. 6. The sensor output digitizer of claim 1 , wherein the sigma delta analog to digital converter is a first order sigma delta analog to digital converter. 7. The sensor output digitizer of claim 1 , wherein the second analog to digital converter comprises a successive approximation register. 8. The sensor output digitizer of claim 7 , wherein the successive approximation register is an eleven bit successive approximation register. 9. The sensor output digitizer of claim 1 , wherein the first intermediate output comprises a residual voltage of the sigma delta analog to digital converter. 10. The sensor output digitizer of claim 1 , further comprising an accumulator coupled between the second intermediate output from the sigma delta analog to digital converter and the digital output combiner. 11. The sensor output digitizer of claim 1 , wherein the one or more sensors comprise a micro electro-mechanical system (MEMS) sensor. 12. The sensor output digitizer of claim 1 , further comprising a clocked drive circuit that triggers sequential selection of sensor outputs by the multiplexer stage. 13. A method to digitize sensor outputs from one or more sensors, comprising: selecting sensor outputs in a sequential selection sequence, resulting in a stream of selected sensor outputs; using a multi-stage analog to digital converter to convert the stream of selected sensor outputs into a stream of digitized outputs, wherein the using the multi-stage analog to digital converter comprises: using a sigma delta analog to digital converter to convert the stream of selected sensor outputs into a first intermediate output and a second intermediate output; and using a second analog to digital converter to convert the first intermediate output into a third intermediate output while the multi-stage analog to digital converter continues to use the sigma delta analog to digital converter to convert the stream of selected sensor outputs; and re-scaling and summing the second intermediate output and the third intermediate output to produce the stream of digitized sensor outputs. 14. The method to digitize sensor outputs from one or more sensors of claim 13 , wherein the sequential selection sequence is a round-robin selection sequence. 15. The method to digitize sensor outputs from one or more sensors of claim 13 , further comprising amplifying the stream of selected sensor outputs prior to using the multi-stage analog to digital converter to convert the stream of selected sensor outputs into the stream of digitized outputs. 16. The method to digitize sensor outputs from one or more sensors of claim 15 , further comprising resetting, upon selection of a sensor output, an amplifier used to amplify the stream of selected sensor outputs. 17. The method to digitize sensor outputs from one or more sensors of claim 16 , further comprising, after amplifying the stream of selected sensor outputs, demodulating the stream of selected sensor outputs prior to using the multi-stage analog to digital converter to convert the stream of selected sensor outputs into the stream of digitized outputs. 18. The method to digitize sensor outputs from one or more sensors of claim 13 , wherein the sigma delta analog to digital converter is a first order sigma delta analog to digital converter. 19. The method to digitize sensor outputs from one or more sensors of claim 13 , wherein the second analog to digital converter comprises a successive approximation register. 20. The method to digitize sensor outputs from one or more sensors of claim 13 , further comprising accumulating the second intermediate output for use in re-scaling and summing the second intermediate output and the third intermediate output to produce the stream of digitized sensor outputs. 21. The method to digitize sensor outputs from one or more sensors of claim 13 , wherein the sensor outputs comprise outputs from a micro electro-mechanical system (MEMS) sensor. 22. The method to digitize sensor outputs from one or more sensors of claim 13 , further comprising triggering the selecting sensor outputs in the sequential selection sequence using a clocked drive circuit.

Assignees

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Classifications

  • G01D9/32Primary

    there being a common recording element for two or more variables · CPC title

  • containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS] (B81B7/04 takes precedence) · CPC title

  • Sensors · CPC title

  • the steps being performed sequentially in series-connected stages (H03M1/141, H03M1/143, H03M1/16 take precedence) · CPC title

  • with scale factor modification, i.e. by changing the amplification between the steps {(H03M1/141 takes precedence)} · CPC title

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What does patent US11933648B2 cover?
The described technology is generally directed towards a sensor output digitizer. The sensor output digitizer can comprise a multiplexer stage, a multi-stage analog to digital converter, and a digital output combiner. The multiplexer stage can be configured to sequentially select sensor outputs from one or more sensors, resulting in a stream of selected sensor outputs. The multi-stage analog to…
Who is the assignee on this patent?
Invensense Inc
What technology area does this patent fall under?
Primary CPC classification G01D9/32. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 19 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).