Display substrate and manufacturing method thereof, and display apparatus

Patent metadata

Field	Value
Publication number	US-11930665-B2
Application number	US-202117789543-A
Country	US
Kind code	B2
Filing date	Jul 30, 2021
Priority date	Jan 28, 2021
Publication date	Mar 12, 2024
Grant date	Mar 12, 2024

Abstract

A display substrate has a display region and a peripheral region. The display substrate includes a substrate, a first dam, a second dam and a connection portion. The first dam and the second dam are located on a side of the substrate, and are located in the peripheral region. The second dam is farther from the display region than the first dam. A height of the second dam is greater than a height of the first dam. The connection portion is located between the first dam and the second dam. The connection portion connects the first dam and the second dam, and a height of the connection portion is less than the height of the first dam. At least a portion of the first dam, at least a portion of the connection portion and at least a portion of the second dam are of an integrative structure.

First claim

What is claimed is:

1. A display substrate having a display region and a peripheral region, the display substrate comprising:
a substrate;
a first dam and a second dam that are located on a side of the substrate and located in the peripheral region; wherein the second dam is farther from the display region than the first dam, and a height of the second dam is greater than a height of the first dam; and
a connection portion located between the first dam and the second dam, wherein the connection portion connects the first dam and the second dam; and a height of the connection portion is less than the height of the first dam; wherein
at least a portion of the first dam, at least a portion of the connection portion and at least a portion of the second dam are of an integrative structure; and
the first dam includes a plurality of first blocking layers that are stacked in sequence, and the second dam includes a plurality of second blocking layers that are stacked in sequence; and a total number of the second blocking layers is greater than a total number of the first blocking layers; and the connection portion includes one or more connection layers; and a total number of the one or more connection layers is less than the total number of the first blocking layers; or
the first dam includes a plurality of first blocking layers that are stacked in sequence, the second dam includes a plurality of second blocking layers that are stacked in sequence, and a total number of the second blocking layers is greater than a total number of the first blocking layers; the connection portion includes one or more connection layers, and a total number of the one or more connection layers is less than the total number of the first blocking layers; and at least one of the plurality of first blocking layers proximate to the substrate and at least one of the plurality, of second blocking layers proximate to the substrate are connected through at least one connection layer.

2. The display substrate according to claim 1 , wherein
a connection layer in the one or more connection layers connects a first blocking layer in the plurality of first blocking layers and a second blocking layer in the plurality of second blocking layers.

3. The display substrate according to claim 1 , wherein
a side wall of the first dam proximate to the display region has a side proximate to the substrate and a side away from the substrate that is farther from the display region than the side proximate to the substrate, and the side wall is in one of a slope shape and a step shape; and a portion, unconnected to the connection portion, of a side wall of the first dam away from the display region has a side proximate to the substrate and a side away from the substrate that is closer to the display region than the side proximate to the substrate, and the portion is in one of a slope shape and a step shape; and/or
a portion, unconnected to the connection portion, of a side wall of the second dam proximate to the display region has a side proximate to the substrate and a side away from the substrate that is farther from the display region than the side proximate to the substrate, and the portion is in one of a slope shape and a step shape; and a side wall of the second dam away from the display region has a side proximate to the substrate and a side away from the substrate that is closer to the display region than the side proximate to the substrate, and the side wall is in one of a slope shape and a step shape.

4. The display substrate according to claim 1 , wherein
a slope of a portion, unconnected to the connection portion, of a side wall of the first dam away from the display region is less than a slope of a portion, unconnected to the connection portion, of a side wall of the second dam proximate to the display region; and/or
a slope of a side wall of the first dam proximate to the display region is less than a slope of a side wall of the second dam away from the display region.

5. A display substrate having a display region and a peripheral region, the display substrate comprising:
a substrate;
a first dam and a second dam that are located on a side of the substrate and located in the peripheral region; wherein the second dam is farther from the display region than the first dam, and a height of the second dam is greater than a height of the first dam; and
a connection portion located between the first dam and the second dam, wherein the connection portion connects the first dam and the second dam, and a height of the connection portion is less than the height of the first dam: wherein
at least a portion of the first dam, at least a portion of the connection portion and at least a portion of the second dam are of an integrative structure;
the display region includes a main display region and an auxiliary display region;
a light transmittance of a portion of the display substrate located in the auxiliary display region is greater than a light transmittance of a portion of the display substrate located in the main display region; and
the display substrate further comprises a plurality of first sub-pixels and a plurality of second sub-pixels that are all disposed on the side of the substrate; wherein the plurality of first sub-pixels are located in the main display region, and each second sub-pixel includes a pixel driving circuit and a light-emitting device disposed on a side of the pixel driving circuit away from the substrate, the light-emitting device is located in the auxiliary display region and coupled to the pixel driving circuit; and at least one pixel driving circuit in the plurality of second sub-pixels is located outside the auxiliary display region.

6. The display substrate according to claim 5 , further comprising:
a plurality of planarization layers disposed between the pixel driving circuit and the light-emitting device and stacked in sequence; wherein
at least one first blocking layer in the plurality of first blocking layers other than one or two first blocking layers farthest from the substrate each is arranged in a same layer as a respective planarization layer in part of the plurality of planarization layers; and/or
second blocking layers in the plurality of second blocking layers other than one or two second blocking layers farthest from the substrate each are arranged in another same layer as a respective planarization layer in all of the plurality of planarization layers.

7. The display substrate according to claim 6 , further comprising at least one conductive line layer including at least one light-transmitting conductive line; a pixel driving circuit in the at least one pixel driving circuit located in the peripheral region being coupled to a corresponding light-emitting device through a light-transmitting conductive line; wherein at least one of the planarization layers is disposed between the entire at least one conductive line layer and the pixel driving circuit in each second sub-pixel; and another at least one of the planarization layers is disposed between the entire at least one conductive line layer and the light-emitting device; or
the display substrate further comprising at least one conductive line layer including at least one light-transmitting conductive line; a pixel driving circuit in the at least one pixel driving circuit located in the peripheral region being coupled to a corresponding light-emitting device through a light-transmitting conductive line; wherein at least one of the planarization layers is disposed between the entire at least one conductive line layer and the pixel driving circuit in each second sub-pixel; another at least one of the planarization layers is disposed between the entire at least one conductive line layer and the light-emitting device; and the at lea

Assignees

• Mianyang Boe Optoelectronics Tech Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Hu Yong
• Zhang Zerui
• Li Dali
• Luo Xin

Classifications

• H10K59/1213 Primary

  the pixel elements being TFTs · CPC title

• G06F3/0446 Primary

  using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes · CPC title

• H10D86/481

  integrated with passive devices, e.g. auxiliary capacitors · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• H10D86/441 Primary

  Interconnections, e.g. scanning lines · CPC title