System of quantum processors, information processing method, and non-transitory storage medium thereof

Patent metadata

Field	Value
Publication number	US-11928555-B2
Application number	US-202217716961-A
Country	US
Kind code	B2
Filing date	Apr 8, 2022
Priority date	Apr 8, 2021
Publication date	Mar 12, 2024
Grant date	Mar 12, 2024

Abstract

Provided is a system, an information processing method, and a non-transitory storage medium that hardly cause improper operations when a plurality of quantum processors is connected to configure a logical quantum bit. A system includes a plurality of quantum processors, each including a plurality of physical quantum bits, the system performing processing such that the quantum processors of a first group from among the plurality of quantum processors configure at least one logical quantum bit including the physical quantum bits; the quantum processors of the first group perform error checking on the logical quantum bit; the quantum processors of a second group from among the plurality of quantum processors configure at least one logical quantum bit including the physical quantum bits; if an error is detected at least in error checking on the quantum processors of the first group, the system swaps a quantum state of the quantum processors of the first group with a quantum state of the quantum processors of the second group, and the system performs error checking on the logical quantum bit.

First claim

What is claimed is:

1. A system comprising a plurality of quantum processors, each including a plurality of physical quantum bits, the system performing an information processing method, the method including:
a first group of quantum processors from among the plurality of quantum processors configuring at least one first logical quantum bit including the physical quantum bits associated with the first group of quantum processors;
the first group of quantum processors performing first error checking on the at least one first logical quantum bit;
a second group of quantum processors from among the plurality of quantum processors configuring at least one second logical quantum bit including the physical quantum bits associated with the second group of quantum processors;
if an error is detected at least in the first error checking on the first group of quantum processors, the system swapping a quantum state of the first group of quantum processors with a quantum state of the second group of quantum processors; and
the system performing second error checking on the at least one second logical quantum bit.

2. The system according to claim 1 , wherein:
the physical quantum bits included in the first group of quantum processors are coupled over the first group of quantum processors; and
the physical quantum bits included in the second group of quantum processors are coupled over the second group of quantum processors.

3. The system according to claim 1 , wherein:
the first error checking and the second error checking each include a plurality of error syndrome measurements;
results of the error syndrome measurements are selected based on a comparison between results of the error syndrome measurements of the first group of quantum processors and results of the error syndrome measurements in the second group of quantum processors; and
an error is corrected based on the selected results of the error syndrome measurements.

4. The system according to claim 1 , wherein the method further comprises:
a third group of quantum processors from among the plurality of quantum processors configuring at least one third logical quantum bit including the physical quantum bits associated with the third group of quantum processors;
if an error is detected at least in the third error checking on the second group of quantum processors, the system swapping a quantum state of the second group of quantum processors with a quantum state of the third group of quantum processors; and
the system performing third error checking on the at least one third logical quantum bit.

5. An information processing method performed by a system comprising a plurality of quantum processors, each including a plurality of physical quantum bits, the method comprising:
a first group of quantum processors from among the plurality of quantum processors configuring at least one first logical quantum bit including the physical quantum bits associated with the first group of quantum processors;
the first group of quantum processors performing first error checking on the at least one first logical quantum bit;
a second group of quantum processors from among the plurality of quantum processors configuring at least one second logical quantum bit including the physical quantum bits associated with the second group of quantum processors;
if an error is detected at least in the first error checking on the first group of quantum processors, the system swapping a quantum state of the first group of quantum processors with a quantum state of the second group of quantum processors; and
the system performing second error checking on the at least one second logical quantum bit.

6. A non-transitory computer-readable storage medium for recording a program that, when executed by a system comprising a plurality of quantum processors, each including a plurality of physical quantum bits, causes the system to perform an information processing method, the method including:
a first group of quantum processors from among the plurality of quantum processors configuring at least one first logical quantum bit including the physical quantum bits associated with the first group of quantum processors;
the first group of quantum processors performing first error checking on the at least one first logical quantum bit;
a second group of quantum processors from among the plurality of quantum processors configuring at least one second logical quantum bit including the physical quantum bits associated with the second group of quantum processors;
if an error is detected at least in the first error checking on the first group of quantum processors, the system swapping a quantum state of the first group of quantum processors with a quantum state of the second group of quantum processors; and
the system performing second error checking on the at least one second logical quantum bit.

Assignees

• Mercari Inc

Inventors

• Nagayama Shota

Classifications

• G06N10/70 Primary

  Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation · CPC title

• G06N10/40

  Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control · CPC title

• G06N10/80

  Quantum programming, e.g. interfaces, languages or software-development kits for creating or handling programs capable of running on quantum computers; Platforms for simulating or accessing quantum computers, e.g. cloud-based quantum computing · CPC title