Logical memory addressing for network devices

US11928367B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11928367-B2
Application numberUS-202217845740-A
CountryUS
Kind codeB2
Filing dateJun 21, 2022
Priority dateJun 21, 2022
Publication dateMar 12, 2024
Grant dateMar 12, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Some embodiments provide a method for, at a network interface controller (NIC) of a computer, accessing data in a network. From the computer, the method receives a request to access data stored at a logical memory address. The method translates the logical memory address into a memory address of a particular network device storing the requested data. The method sends a data message to the particular network device to retrieve the requested data.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for accessing data in a network, the method comprising: at a network interface controller (NIC) of a computer: receiving a first set of configuration data from a first network device for translating logical memory addresses into memory addresses of the first network device; from the computer, receiving a request to access data stored at a logical memory address; translating the logical memory address into a memory address of the first network device that stores the requested data; sending a data message to the first network device to retrieve the requested data, wherein after the sending of the data message a second network device replaces the first network device in a storage network; and receiving a second set of configuration data from a second network device for translating the logical memory addresses into memory addresses of the second network device for subsequent requests from the computer, wherein the first network device is shut down after a grace period that allows for the NIC and NICs of other computers to update configuration data for translating logical memory addresses. 2. The method of claim 1 , wherein the request is received from a client process executed by a processing unit of the computer. 3. The method of claim 2 , wherein modifications to a location of the data in the network are transparent to the client process. 4. The method of claim 1 , wherein the request is a first request and the logical memory address is a first logical memory address, the method further comprising: from the computer, receiving a second request to access data stored at a second logical memory address; translating the second logical memory address into a memory address of a local memory of the computer; and reading the requested data from the local memory using the translated memory address. 5. The method of claim 1 , wherein translating the logical memory address comprises determining a network address for the particular network device and a logical block address for reading data at a specific memory location of the particular network device. 6. The method of claim 5 , wherein the network address is used to send the data message to the particular network device. 7. The method of claim 1 , wherein the data message is a non-volatile memory express (NVMe) over fabric data message. 8. The method of claim 1 further comprising: receiving a set of data messages from the particular network device conveying the requested data; and providing the requested data to the computer. 9. The method of claim 1 further comprising receiving configuration data from a plurality of respective network devices for translating respective sets of logical memory addresses into memory addresses of the respective network devices. 10. A non-transitory machine-readable medium storing a program which when executed by at least one processing unit of a network interface controller (NIC) of a computer accesses data in a network, the program comprising sets of instructions for: receiving a first set of configuration data from a first network device for translating logical memory addresses into memory addresses of the first network device; from the computer, receiving a request to access data stored at a logical memory address; translating the logical memory address into a memory address of the first network device that stores the requested data; sending a data message to the first network device to retrieve the requested data, wherein after the sending of the data message a second network device replaces the first network device in a storage network; and receiving a second set of configuration data from a second network device for translating the logical memory addresses into memory addresses of the second network device, wherein the first network device is shut down after a grace period that allows for the NIC and NICs of other computers to update configuration data for translating logical memory addresses. 11. The non-transitory machine-readable medium of claim 10 , wherein the request is received from a client process executed by a processing unit of the computer, wherein modifications to a location of the data in the network are transparent to the client process. 12. The non-transitory machine-readable medium of claim 10 , wherein the request is a first request and the logical memory address is a first logical memory address, wherein the program further comprises sets of instructions for: from the computer, receiving a second request to access data stored at a second logical memory address; translating the second logical memory address into a memory address of a local memory of the computer; and reading the requested data from the local memory using the translated memory address. 13. The non-transitory machine-readable medium of claim 10 , wherein the set of instructions for translating the logical memory address comprises a set of instructions for determining a network address for the particular network device and a logical block address for reading data at a specific memory location of the particular network device. 14. The non-transitory machine-readable medium of claim 13 , wherein the network address is used to send the data message to the particular network device. 15. The non-transitory machine-readable medium of claim 10 , wherein the program further comprises sets of instructions for: receiving a set of data messages from the particular network device conveying the requested data; and providing the requested data to the computer. 16. The non-transitory machine-readable medium of claim 10 , wherein the program further comprises a set of instructions for receiving configuration data from a plurality of respective network devices for translating respective sets of logical memory addresses into memory addresses of the respective network devices.

Assignees

Inventors

Classifications

  • G06F3/067Primary

    Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS] · CPC title

  • Improving or facilitating administration, e.g. storage management · CPC title

  • Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices · CPC title

  • Improving I/O performance · CPC title

  • Controller construction arrangements · CPC title

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What does patent US11928367B2 cover?
Some embodiments provide a method for, at a network interface controller (NIC) of a computer, accessing data in a network. From the computer, the method receives a request to access data stored at a logical memory address. The method translates the logical memory address into a memory address of a particular network device storing the requested data. The method sends a data message to the parti…
Who is the assignee on this patent?
VMware LLC
What technology area does this patent fall under?
Primary CPC classification G06F3/067. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 12 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).