Differential mode converter, and measuring device including differential mode converter

Patent metadata

Field	Value
Publication number	US-11921139-B2
Application number	US-201916655696-A
Country	US
Kind code	B2
Filing date	Oct 17, 2019
Priority date	Apr 19, 2017
Publication date	Mar 5, 2024
Grant date	Mar 5, 2024

Abstract

A differential mode converter that includes an input mode converter configured to convert an input voltage in a single-ended mode into a first differential voltage and a second differential voltage to be output, the first differential voltage and the second differential voltage being symmetric with respect to a reference voltage and having a form of a square wave; and a chopper configured to receive the first differential voltage and the second differential voltage and determine a first chopping voltage and a second chopping voltage based on the first differential voltage and the second differential voltage to output the first chopping voltage and the second chopping voltage, the first chopping voltage and the second chopping voltage being symmetric with respect to the reference voltage and having a form of a DC voltage.

First claim

What is claimed is:

1. A differential mode converter comprising:
an input mode converter configured to convert an input voltage input in a single-ended mode into a first differential voltage and a second differential voltage to be output based upon a first clock signal and a second clock signal, wherein the input mode converter further comprises:

a first amplifier comprising:
a first input terminal to which a signal is inputted through a target resistance,
a second input terminal to which the reference voltage is inputted,
a first output terminal which outputs the first differential voltage;

a second amplifier comprising:
a third input terminal to which a signal is inputted through the target resistance,
a fourth input terminal to which the reference voltage is inputted, and
a second output terminal which outputs the second differential voltage, the first clock signal and the second clock signal have opposite logic states, and the first differential voltage and the second differential voltage are symmetric with respect to a reference voltage and have a form of a square wave; and
a chopper configured to receive the first differential voltage and the second differential voltage, wherein a first chopping voltage and a second chopping voltage are based on the first differential voltage and the second differential voltage to output the first chopping voltage and the second chopping voltage, and the first chopping voltage and the second chopping voltage are symmetric with respect to the reference voltage and have a DC voltage.

2. The differential mode converter of claim 1 , further comprising:
a low pass filter configured to remove high frequency noise and offset of the first chopping voltage and the second chopping voltage.

3. The differential mode converter of claim 1 , wherein the input mode converter comprises:
a first switch having one end connected to the input voltage, the other end of the first switch being connected to the first input terminal of the first amplifier;
a second switch having one end connected to the first output terminal of the first amplifier, the other end of the second switch being connected to the third input terminal of the second amplifier;
a third switch having one end connected to the input voltage, the other end of the third switch being connected to the third input terminal of the second amplifier; and
a fourth switch having one end connected to the second output terminal of the second amplifier, the other end of the fourth switch being connected to the first input terminal of the first amplifier.

4. The differential mode converter of claim 3 , wherein the first clock signal and the second clock signal are generated from a clock signal generator disposed outside the differential mode converter, the first clock signal and the second clock signal having a form of a square wave,
the first switch and the second switch are turned ON when the logic state of the first clock signal is high, and
the third switch and the fourth switch are turned ON when the logic state of the second clock signal is high.

5. The differential mode converter of claim 4 , wherein the input mode converter further comprises:
a first resistance disposed between the first input terminal and the first output terminal of the first amplifier;
a second resistance disposed between the third input terminal and the second output terminal of the second amplifier;
a third resistance disposed between the second switch and the first output terminal of the first amplifier; and
a fourth resistance disposed between the fourth switch and the second output terminal of the second amplifier.

6. The differential mode converter of claim 5 , wherein the first resistance, the second resistance, the third resistance and the fourth resistance have a same resistance value.

7. The differential mode converter of claim 1 , wherein the chopper comprises:
an input terminal to which the first differential voltage is inputted;
an input terminal to which the second differential voltage is inputted;
an output terminal which outputs the first chopping voltage;
an output terminal which outputs the second chopping voltage;
a fifth switch having one end connected to the input terminal to which the first differential voltage is inputted, the other end of the fifth switch being connected to the output terminal which outputs the first chopping voltage;
a sixth switch having one end connected to the input terminal to which the second differential voltage is inputted, the other end of the sixth switch being connected to the output terminal which outputs the second chopping voltage;
a seventh switch having one end connected to the input terminal to which the first differential voltage is inputted, the other end of the seventh switch being connected to the output terminal which outputs the second chopping voltage; and
an eighth switch having one end connected to the input terminal to which the second differential voltage is inputted, the other end of the eighth switch being connected to the output terminal which outputs the first chopping voltage.

8. The differential mode converter of claim 7 , wherein the first clock signal and the second clock signal are generated from a clock signal generator disposed outside the differential mode converter, the first clock signal and the second clock signal having a form of a square wave,
the fifth switch and the sixth switch are turned ON when the logic state of the first clock signal is high, and
the seventh switch and the eighth switch are turned ON when the logic state of the second clock signal is high.

9. A measuring device comprising:
a target resistance whose resistance value is to be measured;
an input mode converter configured to convert an input voltage transmitted through the target resistance in a single-ended mode into a first differential voltage and a second differential voltage to be output based upon a first clock signal and a second clock signal, wherein the input mode converter further comprises: a first amplifier comprising:
a first input terminal to which a signal is inputted through a target resistance,
a second input terminal to which the reference voltage is inputted,
a first output terminal which outputs the first differential voltage;

a second amplifier comprising:
a third input terminal to which a signal is inputted through the target resistance,
a fourth input terminal to which the reference voltage is inputted, and
a second output terminal which outputs the second differential voltage, the first clock signal and the second clock signal have opposite logic states, and the first differential voltage and the second differential voltage are symmetric with respect to a reference voltage and have a form of a square wave;
a chopper configured to receive the first differential voltage and the second differential voltage, wherein a first chopping voltage and a second chopping voltage are based on the first differential voltage and the second differential voltage to output the first chopping voltage and the second chopping voltage, and the first chopping voltage and the second chopping voltage are symmetric with respect to the reference voltage and have a DC voltage; and
an analog-to-digital converter configured to perform an analog-to-digital conversion on the first output voltage and the second output voltage to output a digital signal based on the resistance value of the target resistance.

10. The measuring device of claim 9 , further comprising:
a low pass filter configured to remove high frequency noise and offset of the first chopping voltage and the second chopping voltage, and provide the first output voltage and the second

Assignees

• Ulsan National Institute Of Science And Tech

Inventors

• Kim Jae Joon
• Kim Seungmok
• Park Kyeong-Hwan

Classifications

• G01R27/14 Primary

  Measuring resistance by measuring current or voltage obtained from a reference source (G01R27/16, G01R27/20, G01R27/22 take precedence) · CPC title

• G01R27/00

  Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom · CPC title

• H03F3/45179

  using MOSFET transistors as the active amplifying circuit (H03F3/45278 takes precedence) · CPC title

• H03M1/34

  Analogue value compared with reference values (H03M1/48 takes precedence) · CPC title

• H03M3/04 Primary

  Differential modulation with several bits {, e.g. differential pulse code modulation [DPCM] (H03M3/30 takes precedence)} · CPC title