Clock spread spectrum circuit, electronic equipment, and clock spread spectrum method

Patent metadata

Field	Value
Publication number	US-11916557-B2
Application number	US-202217836419-A
Country	US
Kind code	B2
Filing date	Jun 9, 2022
Priority date	Apr 23, 2019
Publication date	Feb 27, 2024
Grant date	Feb 27, 2024

Abstract

A clock spread spectrum circuit, an electronic equipment, and a clock spread spectrum method are disclosed. The clock spread spectrum circuit (10) includes a control circuit (11) and a signal generation circuit (12). The control circuit (11) is configured to generate a frequency control word according to a modulation parameter, and the frequency control word changes discretely with time; and the signal generation circuit (12) is configured to receive the frequency control word and generate and output a spread spectrum output signal that is spectrum-spread according to the frequency control word, and the spread spectrum output signal corresponds to the frequency control word.

First claim

What is claimed is:

1. A clock spread spectrum circuit, comprising:
a control circuit, configured to generate a frequency control word according to a modulation parameter, wherein the frequency control word changes discretely with time; and
a signal generation circuit, configured to receive the frequency control word and generate and output a spread spectrum output signal that is spectrum-spread according to the frequency control word, wherein the spread spectrum output signal corresponds to the frequency control word;
wherein the signal generation circuit comprises:
a base time unit generation sub-circuit, configured to generate and output a base time unit; and
a spread spectrum sub-circuit, configured to generate and output the spread spectrum output signal according to the frequency control word and the base time unit;
the spread spectrum sub-circuit is a time average frequency direct period synthesizer;
wherein the frequency control word is expressed as:
F ( t )= I+r ( t ),

wherein F(t) is the frequency control word, I is an integer part of the frequency control word, I is a constant and an integer, r(t) is a decimal part of the frequency control word, r(t) is a decimal and discretely changes with the time, and t represents the time;
wherein the modulation parameter comprises a spread spectrum depth coefficient, a spread spectrum reference value, a modulation rate, and a modulation mode, which correspond to the spread spectrum output signal,
the control circuit comprises: a decimal generation sub-circuit, configured to generate the decimal part according to the spread spectrum depth coefficient, the spread spectrum reference value, the modulation mode, and the modulation rate;
wherein the decimal generation sub-circuit comprises:
a frequency modulation control module, configured to generate a frequency modulation clock signal according to the modulation rate to control a rate of change of the frequency control word; and
a decimal generation module, configured to generate and output the decimal part to a synthesis sub-circuit according to the modulation mode, the spread spectrum depth coefficient, and the spread spectrum reference value under control of the frequency modulation clock signal;
wherein the decimal generation module comprises a selection sub-module and a plurality of modulation mode sub-modules corresponding to a plurality of modulation modes,
the plurality of modulation modes comprise at least two modulation modes selected from a group consisting of a triangle modulation mode, a sawtooth modulation mode, a sinusoidal modulation mode, and a random modulation mode,
each modulation mode sub-module of the plurality of modulation mode sub-modules is configured to generate a middle decimal part corresponding to a modulation mode corresponding to the modulation mode sub-module according to the modulation mode corresponding to the modulation mode sub-module, the spread spectrum depth coefficient, and the spread spectrum reference value;
the selection sub-module is configured to select one of a plurality of middle decimal parts generated by the plurality of modulation mode sub-modules as the decimal part according to the modulation mode.

2. The clock spread spectrum circuit according to claim 1 ,
wherein the modulation parameter further comprises a reference frequency corresponding to the spread spectrum output signal, and
the control circuit further comprises:
an integer generation sub-circuit, configured to generate the integer part according to the reference frequency; and
the synthesis sub-circuit, configured to receive the decimal part and the integer part and generate the frequency control word based on the decimal part and the integer part.

3. The clock spread spectrum circuit according to claim 1 , wherein the frequency modulation control module comprises:
a counting sub-module, configured to count a reference clock signal to obtain a count value of the reference clock signal; and
a timing sub-module, configured to determine a count period according to the modulation rate and determine the frequency modulation clock signal based on the count period and the count value.

4. The clock spread spectrum circuit according to claim 1 , wherein the base time unit generation sub-circuit comprises:
a voltage-controlled oscillator, configured to oscillate at a predetermined oscillation frequency;
a phase-locked loop circuit, configured to lock an output frequency of the voltage-controlled oscillator to a base output frequency; and
K output terminals, configured to output K base output signals with phases evenly spaced, wherein K is a positive integer greater than 1,
wherein the base output frequency is expressed as f d , the base time unit is a time span between any two adjacent base output signals output by the K output terminals, the base time unit is expressed as Δ, and Δ=1/(K·f d ).

5. The clock spread spectrum circuit according to claim 1 , wherein a maximum value of the frequency control word and a minimum value of the frequency control word satisfy a formula: 0≤Fmax−Fmin<1,
wherein Fmin represents the minimum value of the frequency control word, and Fmax represents the maximum value of the frequency control word.

6. An electronic equipment, comprising a clock spread spectrum circuit,
wherein the clock spread spectrum circuit comprises:
a control circuit, configured to generate a frequency control word according to a modulation parameter, wherein the frequency control word changes discretely with time; and
a signal generation circuit, configured to receive the frequency control word and generate and output a spread spectrum output signal that is spectrum-spread according to the frequency control word, wherein the spread spectrum output signal corresponds to the frequency control word;
wherein the signal generation circuit comprises:
a base time unit generation sub-circuit, configured to generate and output a base time unit; and
a spread spectrum sub-circuit, configured to generate and output the spread spectrum output signal according to the frequency control word and the base time unit;
the spread spectrum sub-circuit is a time average frequency direct period synthesizer;
wherein the frequency control word is expressed as:
F ( t )= I+r ( t ),

wherein F(t) is the frequency control word, I is an integer part of the frequency control word, I is a constant and an integer, r(t) is a decimal part of the frequency control word, r(t) is a decimal and discretely changes with the time, and t represents the time;
wherein the modulation parameter comprises a spread spectrum depth coefficient, a spread spectrum reference value, a modulation rate, and a modulation mode, which correspond to the spread spectrum output signal,
the control circuit comprises: a decimal generation sub-circuit, configured to generate the decimal part according to the spread spectrum depth coefficient, the spread spectrum reference value, the modulation mode, and the modulation rate;
wherein the decimal generation sub-circuit comprises:
a frequency modulation control module, configured to generate a frequency modulation clock signal according to the modulation rate to control a rate of change of the frequency control word; and
a decimal generation module, configured to generate and output the decimal part to a synthesis sub-circuit according to the modulation mode, the spread spectrum depth coefficient, and the spread spectrum reference value under control of the frequency modulation clock signal;
wherein the decimal generation module comprises a selection sub-module and a plurality of modulation mode sub-modules corresponding to a plurality of modulation modes,
the plurality of modulation modes comprise at least two modulation modes selected from a group

Assignees

• Beijing Boe Technology Dev Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Wei Xiangye
• Xiu Liming
• Ma Yuhai

Classifications

• H03K5/1252 Primary

  Suppression or limitation of noise or interference (specially adapted for transmission systems H04B15/00, H04L25/08) · CPC title

• G06F1/04

  Generating or distributing clock signals or signals derived directly therefrom · CPC title

• H03K5/00006 Primary

  Changing the frequency (modulating pulses H03K7/00; frequency dividers H03K21/00 - H03K29/00; additive or subtractive mixing of two pulse rates into one G06F7/605; pulse rate dividers G06F7/68) · CPC title

• H03K4/06 Primary

  having triangular shape · CPC title

• H03K4/08

  having sawtooth shape · CPC title