Sensing circuit, display device and method of operating a sensing circuit

US11915650B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11915650-B2
Application numberUS-202217986342-A
CountryUS
Kind codeB2
Filing dateNov 14, 2022
Priority dateApr 4, 2022
Publication dateFeb 27, 2024
Grant dateFeb 27, 2024

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Abstract

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A sensing circuit of a display device includes a sensing line initialization circuit which substantially simultaneously initializes a first sensing line and a second sensing line in a first sub-sensing period of a sensing period, a first line selection switch which couples the first sensing line to a sensing channel in the first sub-sensing period, a second line selection switch which couples the second sensing line to the sensing channel in a second sub-sensing period of the sensing period, and the sensing channel which samples a first sensing voltage of the first sensing line in a first sampling period of the first sub-sensing period, and samples a second sensing voltage of the second sensing line in a second sampling period of the second sub-sensing period. The second sensing line is not initialized during a period from the first sampling period to the second sampling period.

First claim

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What is claimed is: 1. A sensing circuit of a display device, the sensing circuit comprising: a sensing line initialization circuit which substantially simultaneously initializes a first sensing line and a second sensing line in a first sub-sensing period of a sensing period; a first line selection switch which couples the first sensing line to a sensing channel in the first sub-sensing period; a second line selection switch which couples the second sensing line to the sensing channel in a second sub-sensing period of the sensing period; and the sensing channel which samples a first sensing voltage of the first sensing line in a first sampling period of the first sub-sensing period, and samples a second sensing voltage of the second sensing line in a second sampling period of the second sub-sensing period, wherein the second sensing line is not initialized during a period from the first sampling period to the second sampling period, and the second sampling period is shorter than the first sampling period. 2. The sensing circuit of claim 1 , wherein, in the first sub-sensing period, after the first and second sensing lines are initialized, a voltage of the first sensing line becomes the first sensing voltage for a first pixel coupled to the first sensing line, and a voltage of the second sensing line becomes the second sensing voltage for a second pixel coupled to the second sensing line, and wherein the voltage of the second sensing line is maintained as the second sensing voltage until the second sampling period of the second sub-sensing period. 3. The sensing circuit of claim 1 , wherein the sensing line initialization circuit includes: a first sensing line initialization switch which applies an initialization voltage to the first sensing line in response to a sensing line initialization signal; and a second sensing line initialization switch which applies the initialization voltage to the second sensing line in response to the sensing line initialization signal. 4. The sensing circuit of claim 1 , wherein the sensing channel includes: a sampling capacitor including a first electrode and a second electrode; a first sampling switch which couples the first and second line selection switches to the first electrode of the sampling capacitor in response to a sampling signal; and a first reference switch which applies a reference voltage to the second electrode of the sampling capacitor in response to a reference signal. 5. The sensing circuit of claim 4 , further comprising: a reference channel including: a reference capacitor including a first electrode and a second electrode; a second sampling switch which applies an initialization voltage to the first electrode of the reference capacitor in response to the sampling signal; and a second reference switch which applies the reference voltage to the second electrode of the reference capacitor in response to the reference signal; and a channel connection switch which couples the first electrode of the sampling capacitor and the first electrode of the reference capacitor to each other in response to a channel connection signal. 6. The sensing circuit of claim 5 , further comprising: an analog-to-digital converter; and a switch matrix which couples the sensing channel and the reference channel to the analog-to-digital converter. 7. The sensing circuit of claim 6 , wherein the sensing period includes: the first sub-sensing period in which a first sensing operation for a first pixel coupled to the first sensing line is performed; the second sub-sensing period in which a second sensing operation for a second pixel coupled to the second sensing line is performed; and a data output period in which first sensing data corresponding to the first sensing voltage and second sensing data corresponding to the second sensing voltage are output, wherein the first sub-sensing period includes: a sensing line initialization period in which the first sensing line and the second sensing line are substantially simultaneously initialized; a first capacitor initialization period in which the sampling capacitor and the reference capacitor are initialized; the first sampling period in which the first sensing voltage of the first sensing line is sampled; and a first analog-to-digital conversion period in which the first sensing voltage is converted into the first sensing data, and wherein the second sub-sensing period includes: the second sampling period in which the second sensing voltage of the second sensing line is sampled; and a second analog-to-digital conversion period in which the second sensing voltage is converted into the second sensing data. 8. The sensing circuit of claim 7 , wherein, in the sensing line initialization period, a sensing line initialization signal has an active level, and wherein the sensing line initialization circuit applies the initialization voltage to the first sensing line and the second sensing line in response to the sensing line initialization signal having the active level. 9. The sensing circuit of claim 7 , wherein, in the first capacitor initialization period, the sampling signal, the reference signal and the channel connection signal have an active level, wherein the second sampling switch is turned on in response to the sampling signal having the active level, the channel connection switch is turned on in response to the channel connection signal having the active level, the initialization voltage is applied to the first electrode of the reference capacitor through the second sampling switch, and the initialization voltage is applied to the first electrode of the sampling capacitor through the second sampling switch and the channel connection switch, and wherein the first reference switch and the second reference switch are turned on in response to the reference signal having the active level, the reference voltage is applied to the second electrode of the sampling capacitor through the first reference switch, and the reference voltage is applied to the second electrode of the reference capacitor through the second reference switch. 10. The sensing circuit of claim 7 , wherein the first capacitor initialization period overlaps the sensing line initialization period. 11. The sensing circuit of claim 7 , wherein, in the first sampling period, a first line selection signal, the sampling signal and the reference signal have an active level, and a second line selection signal and the channel connection signal have an inactive level, wherein the first line selection switch is turned on in response to the first line selection signal having the active level, the first sampling switch and the second sampling switch are turned on in response to the sampling signal having the active level, the first sensing voltage of the first sensing line is applied to the first electrode of the sampling capacitor through the first line selection switch and the first sampling switch, and the initialization voltage is applied to the first electrode of the reference capacitor through the second sampling switch, and wherein the first reference switch and the second reference switch are turned on in response to the reference signal having the active level, the reference voltage is applied to the second electrode of the sampling capacitor through the first reference switch, and the reference voltage is applied to the second electrode of the reference capacitor through the second reference switch. 12. The sensing circuit of claim 7 , wherein, in the first analog-to-digital conversion period, the channel connection signal has an active level, wherein the channel connection switch couples the first

Assignees

Inventors

Classifications

  • G09G3/3233Primary

    with pixel circuitry controlling the current through the light-emitting element · CPC title

  • Layout of electrodes and connections · CPC title

  • used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title

  • being a dynamic memory with more than one capacitor · CPC title

  • Details of timing specific for flat panels, other than clock recovery · CPC title

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What does patent US11915650B2 cover?
A sensing circuit of a display device includes a sensing line initialization circuit which substantially simultaneously initializes a first sensing line and a second sensing line in a first sub-sensing period of a sensing period, a first line selection switch which couples the first sensing line to a sensing channel in the first sub-sensing period, a second line selection switch which couples t…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3233. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 27 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).