Management of power to internal subsystems within a system on chip

Patent metadata

Field	Value
Publication number	US-11914445-B2
Application number	US-202017787130-A
Country	US
Kind code	B2
Filing date	Dec 18, 2020
Priority date	Dec 20, 2019
Publication date	Feb 27, 2024
Grant date	Feb 27, 2024

Abstract

An electronic device comprising a system on chip and an external module. The system on chip includes a plurality of internal subsystems and a power management system including a plurality of internal voltage regulators which supply power to the plurality of internal subsystems. Each of the internal voltage regulators has an associated current limiter. The external module includes at least one external voltage regulator which can provide power to at least one of the internal subsystems. The power management system during a start-up phase enables the internal voltage regulators and the current limiters and in a subsequent phase determines an externally powered set of the internal subsystems, disables the corresponding internal voltage regulators, and disables the current limiters associated with the internal subsystems not externally powered.

First claim

The invention claimed is:

1. An electronic device comprising:
a system on chip, including:
a plurality of internal subsystems; and
a power management system comprising a plurality of internal voltage regulators arranged to supply power to the plurality of internal subsystems, each of the internal voltage regulators having an associated current limiter; and
an external module comprising at least one external voltage regulator and connected to the system on chip such that the external voltage regulator can provide power to at least one of said internal subsystems on the system on chip,

wherein the power management system is arranged during a start-up phase to enable said internal voltage regulators and said current limiters and in a subsequent phase to:
determine a first set of the internal subsystems powered by the external voltage regulator(s) and a second set of the internal subsystems not powered by the external voltage regulator(s);
disable one or more of said internal voltage regulators corresponding to the first set of internal subsystems; and
disable one or more of said current limiters associated with the internal voltage regulators which correspond to the second set of internal subsystems.

2. The electronic device as claimed in claim 1 wherein the power management system is arranged to read configuration information regarding said first set of internal subsystems from a non-volatile memory location.

3. The electronic device as claimed in claim 2 wherein the subsequent phase is after a point a start-up sequence which is sufficiently stable that a processor of the SoC is able to read data from said non-volatile memory location.

4. The electronic device as claimed in claim 2 wherein the system on chip comprises a user interface to allow a user to store a regulator configuration in the non-volatile memory.

5. The electronic device as claimed in claim 1 wherein the power management comprises a voltage monitoring portion.

6. The electronic device as claimed in claim 1 wherein the current limiters are included within the corresponding voltage regulators.

7. The electronic device as claimed in claim 1 wherein the current limiters each comprise a respective digital controller arranged to receive a digital input signal to enable or disable the current limiter.

8. The electronic device as claimed in claim 1 comprising a primary power source connected to the external module to provide power to the external voltage regulator(s) and directly to the system on chip in order to provide power to the internal voltage regulator(s).

9. The electronic device as claimed in claim 1 wherein the system on chip comprises at least one general purpose input/output module providing communication to at least one of said internal subsystems and powered by an external voltage regulator.

10. The electronic device as claimed in claim 9 wherein the power management system is arranged to determine whether said at least one general purpose input/output module is powered and to control access to the at least one general purpose input/output module to allow access to the GPIO module if the at least one general purpose input/output module is determined to be powered.

11. The electronic device as claimed in claim 9 wherein the system on chip comprises a plurality of general purpose input/output modules.

12. The electronic device as claimed in claim 9 wherein the power management system is arranged to determine whether said at least one general purpose input/output module is powered by monitoring a voltage level provided to the at least one general purpose input/output module.

13. The electronic device as claimed in claim 9 wherein the power management system is arranged to determine whether said at least one general purpose input/output module is powered by reading a status from a non-volatile memory location.

14. The electronic device as claimed in claim 13 wherein the system on chip comprises a user interface to allow a user to store a regulator configuration in the non-volatile memory.

15. The electronic device as claimed in claim 1 comprising a peripheral external to the system on chip and connected to the system on chip for receiving power from one of the internal voltage regulators and the power management system comprises a power gate arranged to limit or prevent current flow from said internal voltage regulator to said peripheral when said internal voltage regulator is in a low power mode.

16. The electronic device as claimed in claim 15 wherein the power gate is also arranged to limit or prevent the current flow from said internal voltage regulator to said peripheral when the power management system is in the start-up phase.

17. The electronic device as claimed in claim 15 wherein the power gate is arranged to be controllable from a user application running on the system on chip.

18. The electronic device as claimed in claim 15 wherein the power management system is arranged to increase the amount of power provided by the externally available internal voltage regulator when the power gate is open.

19. The electronic device as claimed in claim 1 , wherein the system on chip includes a radio transmitter and/or receiver to enable wireless data transfer.

Assignees

• Nordic Semiconductor Asa

Inventors

• Gajda Bartosz
• Pedersen Frode

Classifications

• G06F1/3206 Primary

  Monitoring of events, devices or parameters that trigger a change in power modality · CPC title

• G06F1/3296

  by lowering the supply or operating voltage · CPC title

• E04G7/22 Primary

  for scaffold members in end-to-side relation · CPC title

• E04G7/28

  Clips or connections for securing boards (brackets E04G5/06 {; scaffolds comprising special means for supporting or forming platforms, platforms E04G1/15; scaffold boards or planks E04G5/08}) · CPC title

• E04G7/307

  with tying means for connecting the bars or members · CPC title