Semiconductor system and operating method to adjust temperature of semiconductor apparatus and control device

Patent metadata

Field	Value
Publication number	US-11908540-B2
Application number	US-202117646439-A
Country	US
Kind code	B2
Filing date	Dec 29, 2021
Priority date	Sep 24, 2021
Publication date	Feb 20, 2024
Grant date	Feb 20, 2024

Abstract

A semiconductor system includes a semiconductor apparatus and a control device. The semiconductor apparatus performs a preset operation in response to a command signal. The control device controls a temperature adjustment operation so that first temperature information and second temperature information correspond to each other.

First claim

What is claimed is:

1. A semiconductor system comprising:
a semiconductor apparatus operable to perform a preset operation in response to a command signal; and
a control device operable to control a temperature adjustment operation for at least one of the control device or the semiconductor apparatus on the basis of an actual temperature of the semiconductor apparatus and an actual temperature of the control device so that the actual temperature of the semiconductor apparatus and the actual temperature of the control device correspond to each other,
wherein the control device performs the temperature adjustment operation for increasing the actual temperature of the control device when the actual temperature of the control device is lower than the actual temperature of the semiconductor apparatus.

2. The semiconductor system according to claim 1 , wherein the temperature adjustment operation includes at least one of an activation operation, a read operation, an input driving operation, an output driving operation, or a deactivation operation.

3. The semiconductor system according to claim 1 , wherein the semiconductor apparatus includes a semiconductor memory apparatus that is operable to perform a read operation, and
the semiconductor memory apparatus comprises:
a read control circuit operable to control the read operation on the basis of the command signal; and
a temperature sensing circuit operable to sense the actual temperature of the semiconductor memory apparatus and output the sensed actual temperature as the first temperature information.

4. The semiconductor system according to claim 3 , wherein the read control circuit is operable to control the read operation on data stored in a memory cell array during a normal operation, and control the read operation on arbitrary data during the temperature adjustment operation.

5. The semiconductor system according to claim 1 , wherein the control device comprises:
a temperature sensing circuit operable to sense the actual temperature of the control device and output the sensed actual temperature as the second temperature information;
a temperature comparison circuit operable to generate a detection signal by comparing the first temperature information and the second temperature information;
an input/output driving circuit operable to perform at least one driving operation of an input driving operation or an output driving operation on the basis of the detection signal; and
a command generation circuit operable to generate the command signal on the basis of the detection signal.

6. The semiconductor system according to claim 5 , wherein the input/output driving circuit is operable to perform a read operation or a write operation on data on the basis of the command signal during a normal operation, and perform an input driving operation or an output driving operation on arbitrary data on the basis of the detection signal during the temperature adjustment operation.

7. The semiconductor system according to claim 5 , wherein the temperature comparison circuit is operable to generate the detection signal on the basis of temperature information among the first temperature information and the second temperature information that is closer to reference temperature information.

8. The semiconductor system according to claim 5 , wherein the temperature comparison circuit is operable to receive reference temperature information having a predetermined range, and generate the detection signal on the basis of temperature information among the first temperature information and the second temperature information, which is included in the predetermined range.

9. The semiconductor system according to claim 1 , wherein during the temperature adjustment operation, a data transfer path connected between the semiconductor apparatus and the control device is blocked.

10. The semiconductor system according to claim 1 , wherein at least one of the semiconductor apparatus and the control device includes an error correction circuit, and the error correction circuit is operable to control the actual temperature of the semiconductor apparatus or the actual temperature of the control device according to whether an error correction operation is performed.

11. The semiconductor system according to claim 1 , wherein the semiconductor apparatus is one of a plurality of the semiconductor apparatuses each receiving the command signal, and
the control device is operable to control the temperature adjustment operation for each of the plurality of semiconductor apparatuses on the basis of first temperature information provided from each of the plurality of semiconductor apparatuses.

12. The semiconductor system according to claim 11 , wherein the first temperature information includes information corresponding to an actual temperature of each of the plurality of semiconductor apparatuses and information for identifying each of the plurality of semiconductor apparatuses.

13. The semiconductor system according to claim 11 , wherein the plurality of semiconductor apparatuses include a plurality of semiconductor memory apparatuses that are operable to perform read operations, and
each of the plurality of semiconductor memory apparatuses comprises:
a read control circuit operable to control the read operation on the basis of the command signal;
a temperature sensing circuit operable to sense an actual temperature of a corresponding semiconductor memory apparatus and output the sensed temperature as temperature information; and
an information combining circuit operable to output the first temperature information by combining identification information corresponding to the corresponding semiconductor memory apparatus with the temperature information.

14. The semiconductor system according to claim 13 , wherein the control device comprises:
a temperature sensing circuit operable to sense the actual temperature of the control device and output the sensed temperature as the second temperature information;
a temperature comparison circuit operable to generate a detection signal by comparing the first temperature information and the second temperature information;
an input/output driving circuit operable to perform at least one driving operation of an input driving operation and an output driving operation on the basis of the detection signal; and
a command generation circuit operable to generate a plurality of command signals, which correspond to the plurality of semiconductor apparatuses, respectively, on the basis of the first temperature information and the detection signal.

15. An operating method of a semiconductor system, the operating method comprising:
a step of detecting an actual temperature of a semiconductor apparatus and an actual temperature of a control device;
a step of comparing the actual temperature of the semiconductor apparatus and the actual temperature of the control device; and
a step of increasing the actual temperature of one of the semiconductor apparatus and the control device, which has lower temperature information than the other, by performing a temperature adjustment operation on the one of the semiconductor apparatus and the control device so that the actual temperature of the semiconductor apparatus and the actual temperature of the control device correspond to each other.

16. The operating method according to claim 15 , wherein the temperature adjustment operation includes at least one of an activation operation, a read operation, an input driving operation, an output driving operation, a deactivation operation, or an error correction operatio

Assignees

• Sk Hynix Inc

Inventors

• Jang In Jong

Classifications

• G11C7/04 Primary

  with means for avoiding disturbances due to temperature effects · CPC title

• G11C11/40615

  Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs · CPC title

• G11C11/40626

  Temperature related aspects of refresh operations · CPC title

• G11C7/1063

  Control signal output circuits, e.g. status or busy flags, feedback command signals · CPC title

• G11C7/22

  Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management · CPC title