Display panel and electronic device

US11907468B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11907468-B2
Application numberUS-202017801194-A
CountryUS
Kind codeB2
Filing dateNov 24, 2020
Priority dateFeb 21, 2020
Publication dateFeb 20, 2024
Grant dateFeb 20, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display panel includes a display area and a non-display area. The display area includes a touch electrode array consisting of a plurality of touch electrodes, and a plurality of touch signal wires, and the non-display area includes at least two fan-out routing areas. The at least two fan-out routing areas are arranged along a first boundary between the non-display area and the display area, and each fan-out routing area includes a plurality of touch leading wires. The fan-out routing area includes a fan-shaped area and a straight line area, and the fan-shaped area is located between the first boundary and the straight line area. Each touch leading wire includes a first sub-leading wire located in the fan-shaped area and a second sub-leading wire located in the straight line area.

First claim

Opening claim text (preview).

What is claimed is: 1. A display panel, comprising: a display area comprising a touch electrode array; and a non-display area enclosing the display area; wherein the touch electrode array comprises a plurality of touch electrodes and a plurality of touch signal wires, and wherein one touch electrode is electrically connected to at least one touch signal wire; wherein the non-display area comprises at least two fan-out routing areas, wherein the at least two fan-out routing areas are arranged along a first boundary between the non-display area and the display area, wherein each fan-out routing area comprises a plurality of touch leading wires, and wherein the touch leading wires are electrically connected to the touch signal wires in a one-to-one correspondence; wherein each fan-out routing area comprises a fan-shaped area and a straight line area, and wherein the fan-shaped area is located between the first boundary and the straight line area; wherein each touch leading wire comprises a first sub-leading wire connected to a second sub-leading wire, wherein the first sub-leading wire is located in the fan-shaped area, and wherein the second sub-leading wire is located in the straight line area; wherein a distance between two second sub-leading wires that are adjacent and that are located in different straight line areas is a first distance, a distance between two second sub-leading wires that are adjacent and that are located in a same straight line area is a second distance, and the first distance is greater than the second distance; wherein at least some of the plurality of touch signal wires are jump touch signal wires, wherein a shape of each of the jump touch signal wires is a fold line, wherein each of the jump touch signal wires comprises a start point and an end point, wherein the start point is electrically connected to one touch electrode, and wherein the end point intersects the first boundary; and wherein a distance between the start point and a central axis is a third distance, wherein a distance between the end point and the central axis is a fourth distance, and wherein the third distance is greater than the fourth distance. 2. The display panel according to claim 1 , wherein the touch electrode array comprises a plurality of touch electrode rows and a plurality of touch electrode columns, wherein each touch electrode row comprises a plurality of touch electrodes, and wherein each touch electrode column comprises a plurality of touch electrodes; and wherein the central axis of the display area is perpendicular to the first boundary. 3. The display panel according to claim 2 , wherein the plurality of touch electrode columns comprise two edge touch electrode arrays located on edges of the touch electrode array; and wherein touch signal wires that are electrically connected to at least some touch electrodes in at least one edge touch electrode column are jump touch signal wires. 4. The display panel according to claim 3 , wherein a corner of the display area close to a side of the fan-out routing area is an arc corner. 5. The display panel according to claim 3 , wherein the plurality of touch electrode columns further comprise a non-edge touch electrode column, and wherein the non-edge touch electrode column is located between the two edge touch electrode columns; and wherein touch signal wires that are electrically connected to at least some touch electrodes in the non-edge touch electrode column are jump touch signal wires. 6. The display panel according to claim 2 , wherein the touch electrode that is electrically connected to the start point and a touch electrode that is adjacent to the end point are located in different touch electrode columns. 7. The display panel according to claim 2 , wherein the jump touch signal wire comprises at least a first wire segment, and wherein the first wire segment is not parallel to the central axis. 8. The display panel according to claim 7 , wherein the first wire segment is parallel to the first boundary, and the third distance is correlated with a distance between the first wire segment and the first boundary. 9. The display panel according to claim 7 , wherein the touch electrode array comprises a first touch electrode column to an Nth touch electrode column that are sequentially arranged, wherein N is a positive integer greater than or equal to 3; wherein the first touch electrode column is parallel to the central axis, and wherein a distance between the first touch electrode column and the central axis is greater than a distance between any one of the second touch electrode column to the Nth touch electrode column and the central axis; and wherein touch signal wires that are electrically connected to a plurality of touch electrodes of an nth touch electrode column are all jump touch signal wires, wherein touch signal wires that are electrically connected to a plurality of touch electrodes of an (n+1)th touch electrode column are all jump touch signal wires, wherein an end point of the jump touch signal wire is adjacent to an (n+2)th touch electrode column, and wherein n is an odd number, and n<N. 10. The display panel according to claim 9 , wherein a first touch electrode row in the plurality of touch electrode rows is adjacent to a second touch electrode row in the plurality of touch electrode rows, and wherein the first touch electrode row is adjacent to the first boundary; wherein first wire segments of the jump touch signal wires that are respectively electrically connected to the plurality of touch electrodes of the nth touch electrode column overlap the second touch electrode row; and wherein first wire segments of the jump touch signal wires that are respectively electrically connected to the plurality of touch electrodes of the (n+1)th touch electrode column overlap the first touch electrode row. 11. The display panel according to claim 7 , wherein at least one of: the jump touch signal wire further comprises a second wire segment and a third wire segment that are parallel to the central axis, wherein two ends of the first wire segment are respectively connected to one end of the second wire segment and one end of the third wire segment, and wherein the other end of the second wire segment is the start point, and the other end of the third wire segment is the end point; and the jump touch signal wire further comprises a fourth wire segment that is parallel to the central axis, wherein one end of the first wire segment is the start point, wherein the other end of the first wire segment is electrically connected to one end of the fourth wire segment, and wherein the other end of the fourth wire segment is the end point. 12. The display panel according to claim 1 , wherein the display panel further comprises a substrate layer and a metal routing layer located above the substrate layer, and wherein the metal routing layer comprises a first metal routing layer and a second metal routing layer; and wherein at least some of the plurality of touch signal wires comprise a resistance reduction wire segment, wherein the resistance reduction wire segment comprises a first sub-wire segment and a second sub-wire segment that are connected in parallel, and wherein the first sub-wire segment and the second sub-wire segment are respectively located at the first metal routing layer and the second metal routing layer. 13. The display panel according to claim 12 , wherein the display panel further comprises a thin film transistor array layer, a display layer, a packaging layer, and a touch electrode layer that are sequentially arranged above the substrate layer, wherein the touch electrode array is

Assignees

Inventors

Classifications

  • Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads · CPC title

  • Digitisers structurally integrated in a display · CPC title

  • G06F3/0446Primary

    using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes · CPC title

  • G06F3/0416Primary

    Control or interface arrangements specially adapted for digitisers · CPC title

  • by capacitive means · CPC title

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What does patent US11907468B2 cover?
A display panel includes a display area and a non-display area. The display area includes a touch electrode array consisting of a plurality of touch electrodes, and a plurality of touch signal wires, and the non-display area includes at least two fan-out routing areas. The at least two fan-out routing areas are arranged along a first boundary between the non-display area and the display area, a…
Who is the assignee on this patent?
Huawei Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F3/04164. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 20 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).