Display panel, manufacturing method therefor, and display device

Patent metadata

Field	Value
Publication number	US-11903276-B2
Application number	US-202017415469-A
Country	US
Kind code	B2
Filing date	Oct 12, 2020
Priority date	Nov 20, 2019
Publication date	Feb 13, 2024
Grant date	Feb 13, 2024

Abstract

Provided are a display panel, a manufacturing method therefor, and a display device. The display panel comprises a hole in a display region and comprises: a substrate; a drive circuit layer comprising a thin film transistor; a wire, connected to the thin film transistor; one or more isolation members surrounding the hole, disposed on the side of the drive circuit layer, and located between the wire and the hole, at least one isolation member comprising a first and a second isolation layer, and an orthographic projection of a surface of the first isolation layer away from the substrate is inside that of the second isolation layer on the substrate; a planarization layer, on the side of the drive circuit layer and covering the wire; and an anode, on the side of the planarization layer and connected to the wire by a via penetrating the planarization layer.

First claim

What is claimed is:

1. A display panel comprising a hole located at a display area, the display panel comprising:
a substrate;
a driving circuit layer located on one side of the substrate and comprising a thin film transistor;
a trace located on one side of the driving circuit layer away from the substrate and connected to the thin film transistor;
one or more separators surrounding the hole, located on one side of the driving circuit layer away from the substrate and located between the trace and the hole, wherein at least one separator of the one or more separators comprises:
a first separation layer, and
a second separation layer located on one side of the first separation layer away from the driving circuit layer, wherein an orthographic projection of one surface of the first separation layer away from the substrate on the substrate is within an orthographic projection of the second separation layer on the substrate;
a planarization layer located on the one side of the driving circuit layer away from the substrate and covering the trace, the planarization layer not overlapping with the one or more separators; and
an anode located on one side of the planarization layer away from the driving circuit layer and connected to the trace through a via hole penetrating through the planarization layer,
wherein the one or more separators is located between an edge of the planarization layer close to the hole and the hole.

2. The display panel according to claim 1 , wherein the at least one separator further comprises:
a third separation layer located on one side of the first separation layer close to the driving circuit layer, wherein an orthographic projection of the first separation layer on the substrate is within an orthographic projection of the third separation layer on the substrate.

3. The display panel according to claim 2 , wherein the trace comprises:
a first trace layer, wherein a material of the first trace layer is the same as a material of the first separation layer;
a second trace layer located on one side of the first trace layer away from the driving circuit layer, wherein a material of the second trace layer is the same as a material of the second separation layer; and
a third trace layer located on one side of the first trace layer close to the driving circuit layer, wherein a material of the third trace layer is the same as a material of the third separation layer.

4. The display panel according to claim 1 , further comprising a light emitting device layer, wherein the light emitting device layer comprises:
a first light emitting device layer located on the anode and extending to the driving circuit layer on one side of the at least one separator away from the hole; and
a second light emitting device layer located on the second separation layer and spaced apart from the first light emitting device layer.

5. The display panel according to claim 4 , wherein the light emitting device layer further comprises:
a third light emitting device layer extending from an edge of the hole to the driving circuit layer on one side of the at least one separator close to the hole, third light emitting device layer being spaced apart from the second light emitting device layer.

6. The display panel according to claim 4 , wherein the light emitting device layer further comprises:
a fourth light emitting device layer located on the driving circuit layer between adjacent separators of the one or more separators, the fourth light emitting device layer being spaced apart from the second light emitting device layer.

7. The display panel according to claim 4 , wherein the light emitting device layer comprises a functional layer and a cathode located on one side of the functional layer away from the substrate.

8. The display panel according to claim 1 , further comprising:
at least one dam surrounding the hole and located on the one side of the driving circuit layer away from the substrate, wherein the one or more separators are located between the planarization layer and the at least one dam.

9. The display panel according to claim 8 , further comprising:
a crack stop member located on the one side of the driving circuit layer away from the substrate and located between the at least one dam and the hole.

10. The display panel according to claim 1 , wherein the anode comprises:
a first anode layer;
a second anode layer located on one side of the first anode layer away from the driving circuit layer; and
a third anode layer located on one side of the first anode layer close to the driving circuit layer.

11. The display panel according to claim 10 , wherein materials of the second anode layer and the third anode layer comprise indium tin oxide, and a material of the first anode layer comprises silver.

12. The display panel according to claim 2 , wherein materials of the second separation layer and the third separation layer comprise titanium, and a material of the first separation layer comprises aluminum or molybdenum.

13. A display device, comprising the display panel according to claim 1 .

14. A method for manufacturing a display panel, comprising:
providing a substrate structure, wherein the substrate structure comprises:
a substrate comprising a first area for forming a hole of a display area,
a driving circuit layer located on one side of the substrate and comprising a thin film transistor,
a trace located on one side of the driving circuit layer away from the substrate and connected to the thin film transistor,
one or more separators surrounding the first area and located on the one side of the driving circuit layer away from the substrate, wherein at least one separator of the one or more separators comprises a first separation material layer and a second separation layer located on one side of the first separation material layer away from the driving circuit layer, and
a planarization layer located on one side of the driving circuit layer away from the substrate and covering the trace, the planarization layer not overlapping with the one or more separators;
forming an anode material layer covering the substrate structure; and
etching the anode material layer and at least one side surface of the first separation material layer to form an anode and a first separation layer, wherein the anode is connected to the trace through a via hole penetrating through the planarization layer, and an orthographic projection of one surface of the first separation layer away from the substrate on the substrate is within an orthographic projection of the second separation layer on the substrate,
wherein the one or more separators is located between an edge of the planarization layer close to the hole and the hole.

15. The method according to claim 14 , wherein etching the anode material layer and at least one side surface of the first separation material layer comprises:
forming a first mask on one side of the anode material layer away from the substrate, wherein the anode material layer comprises a first anode material layer covering the planarization layer, and a second anode material layer adjacent to the first anode material layer and covering the one or more separators, and the first mask exposes a portion of the first anode material layer;
performing a first etching, with the first mask as a mask, on the exposed portion of the first anode material layer to form the anode;
removing the first mask;
forming a second mask covering the anode, wherein the second mask exposes the second anode material layer and a remaining portion of the first anode material layer;
perform a second etching, wi

Assignees

• Chengdu Boe Optoelect Tech Co
• Boe Technology Group Co Ltd

Inventors

• Zhang Zhen
• Zhao Ning
• Wu Xinwei
• An Xudong
• Wei Yue
• Yang Yuqing

Classifications

• H10K59/12

  Active-matrix OLED [AMOLED] displays · CPC title

• H10K59/873

  Encapsulations · CPC title

• H10K59/80515

  characterised by their shape · CPC title

• H10K59/131 Primary

  Interconnections, e.g. wiring lines or terminals · CPC title

• H10K50/84

  Passivation; Containers; Encapsulations · CPC title