Method of manufacturing semiconductor device

US11903202B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11903202-B2
Application numberUS-202117393642-A
CountryUS
Kind codeB2
Filing dateAug 4, 2021
Priority dateMar 19, 2021
Publication dateFeb 13, 2024
Grant dateFeb 13, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

In one embodiment, a method of manufacturing a semiconductor device includes forming a semiconductor layer including a plurality of metal atoms on a substrate, and forming a first layer including a plurality of silicon atoms and a plurality of nitrogen atoms on the semiconductor layer. The method further includes transferring at least some of the metal atoms in the semiconductor layer into the first layer. and removing the first layer after transferring the at least some of the metal atoms in the semiconductor layer into the first layer. Furthermore, a ratio of a number of the nitrogen atoms relative to a number of the silicon atoms and the nitrogen atoms in the first layer is smaller than 4/7.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method of manufacturing a semiconductor device, comprising: forming a semiconductor layer including a plurality of metal atoms on a substrate; forming a first layer including a plurality of silicon atoms and a plurality of nitrogen atoms on the semiconductor layer; transferring at least some of the metal atoms in the semiconductor layer into the first layer; and removing the first layer after transferring the at least some of the metal atoms in the semiconductor layer into the first layer, wherein a ratio of a number of the nitrogen atoms relative to a number of the silicon atoms and the nitrogen atoms in the first layer is smaller than 4/7. 2. The method of claim 1 , wherein the metal atoms are Fe (iron) atoms, Ni (nickel) atoms, Cu (copper) atoms, Co (cobalt) atoms, Sn (tin) atoms, Pb (lead) atoms, Pd (palladium) atoms, Ru (ruthenium) atoms, Rh (rhodium) atoms, Os (osmium) atoms, Ir (iridium) atoms, Pt (platinum) atoms, Au (gold) atoms, Al (aluminum) atoms or Ag (silver) atoms. 3. The method of claim 1 , wherein the first layer is a silicon layer including a plurality of nitrogen atoms. 4. The method of claim 3 , wherein the silicon layer is an amorphous silicon layer. 5. The method of claim 1 , wherein the ratio of the number of the nitrogen atoms relative to the number of the silicon atoms and the nitrogen atoms in the first layer is 40% or less. 6. The method of claim 1 , wherein the first layer is formed by controlling a ratio of a flow rate of a source gas for the nitrogen atoms and a flow rate of a source gas for the silicon atoms to be 1:5 or less. 7. The method of claim 1 , further comprising: alternately forming a plurality of first films and a plurality of second films on the substrate; forming an opening in the first and second films; and forming a charge storing layer in the opening, wherein the semiconductor layer is formed in the opening via the charge storing layer. 8. The method of claim 7 , wherein the first layer is formed outside the opening and is not formed inside the opening. 9. The method of claim 7 , wherein the first layer is formed at least in the opening. 10. The method of claim 1 , wherein the at least some of the metal atoms in the semiconductor layer are transferred into the first layer by a thermal treatment of the semiconductor layer. 11. The method of claim 10 , wherein the thermal treatment is performed at a temperature of 400° C. or more. 12. The method of claim 10 , wherein the thermal treatment is performed in a chamber same as a chamber in which the semiconductor layer is formed. 13. The method of claim 1 , wherein the first layer is removed using a liquid chemical or gas. 14. The method of claim 1 , wherein the first layer is removed in a chamber same as a chamber in which the semiconductor layer is formed. 15. The method of claim 1 , further comprising: forming a second layer that is a silicon layer including a plurality of boron atoms, a plurality of phosphorus atoms or a plurality of arsenic atoms, on the first layer; transferring the at least some of the metal atoms in the semiconductor layer into the first and second layers; and removing both the first and second layers after transferring the at least some of the metal atoms in the semiconductor layer into both the first and second layers. 16. A method of manufacturing a semiconductor device, comprising: forming a semiconductor layer including a plurality of metal atoms on a substrate; forming a first layer including a plurality of nitrogen atoms on the semiconductor layer; transferring at least some of the metal atoms in the semiconductor layer into the first layer; and removing the first layer after transferring the at least some of the metal atoms in the semiconductor layer into the first layer, wherein the at least some of the metal atoms in the semiconductor layer are transferred into the first layer by a thermal treatment of the semiconductor layer, the thermal treatment being performed in a chamber same as a chamber in which the semiconductor layer is formed, or wherein the first layer is removed in a chamber same as the chamber in which the semiconductor layer is formed. 17. The method of claim 16 , wherein the first layer includes a plurality of silicon atoms and the plurality of nitrogen atoms. 18. The method of claim 17 , wherein a ratio of a number of the nitrogen atoms relative to a number of the silicon atoms and the nitrogen atoms in the first layer is smaller than 4/7. 19. The method of claim 17 , wherein a ratio of a number of the nitrogen atoms relative to a number of the silicon atoms and the nitrogen atoms in the first layer is 40% or less. 20. The method of claim 16 , wherein the first layer is a silicon layer including the plurality of nitrogen atoms.

Assignees

Inventors

Classifications

  • the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

  • the compound being a silane, e.g. disilane, methylsilane or chlorosilane · CPC title

  • using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition (deposition by physical ablation of a target H10P14/6329) · CPC title

  • Amorphous · CPC title

  • Silicon, silicon germanium or germanium · CPC title

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What does patent US11903202B2 cover?
In one embodiment, a method of manufacturing a semiconductor device includes forming a semiconductor layer including a plurality of metal atoms on a substrate, and forming a first layer including a plurality of silicon atoms and a plurality of nitrogen atoms on the semiconductor layer. The method further includes transferring at least some of the metal atoms in the semiconductor layer into the …
Who is the assignee on this patent?
Kioxia Corp
What technology area does this patent fall under?
Primary CPC classification H10D64/037. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 13 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).