Digitally controlled low dropout regulator

Patent metadata

Field	Value
Publication number	US-11899479-B2
Application number	US-202017616228-A
Country	US
Kind code	B2
Filing date	Mar 16, 2020
Priority date	Jun 11, 2019
Publication date	Feb 13, 2024
Grant date	Feb 13, 2024

Abstract

To provide a digitally controlled LDO regulator that can control an output voltage even during an auto-zero processing period. A digitally controlled low dropout regulator is provided that includes a plurality of AD converters and an impedance variable circuit, each of the plurality of AD converters including a comparator, in which a first signal from each of the plurality of AD converters is input to the impedance variable circuit; a second signal output from the impedance variable circuit is input to one of two terminals of each of the plurality of AD converters; when one of the plurality of AD converters is in operation, another of the plurality of AD converters performs auto-zero processing to set a voltage value used as a reference; and the comparator compares a voltage value of the second signal input to the one of the two terminals with the set voltage value.

First claim

The invention claimed is:

1. A digitally controlled low dropout regulator, comprising:
a plurality of Analog-Digital (AD) converters; and
an impedance variable circuit, each of the plurality of AD converters including a comparator, wherein
a first signal from each of the plurality of AD converters is input to the impedance variable circuit,
a plurality of the first signals is input to the impedance variable circuit, and a second signal output from the impedance variable circuit is input to one of two terminals of each of the plurality of AD converters,
when one of the plurality of AD converters is in operation, another of the plurality of AD converters performs auto-zero processing to set a voltage value used as a reference, and
the comparator included in each of the plurality of AD converters compares a voltage value of the second signal input to the one of the two terminals with the set voltage value.

2. The digitally controlled low dropout regulator according to claim 1 , wherein
each of the plurality of AD converters is an AD converter by which the auto-zero processing is to be performed.

3. The digitally controlled low dropout regulator according to claim 1 , further comprising
a control circuit, the control circuit including a pulse generating circuit, the pulse generating circuit generating a pulse used to perform the auto-zero processing.

4. The digitally controlled low dropout regulator according to claim 3 , wherein
the pulse generating circuit includes a delay element and a computation element, the delay element delaying a timing of an input clock signal, the computation element performing computation with respect to the delayed clock signal and a non-delayed clock signal to generate a pulse.

5. The digitally controlled low dropout regulator according to claim 1 , further comprising
a control circuit, wherein
when the other of the plurality of AD converters is not performing the auto-zero processing, the control circuit stops the other of the plurality of AD converters.

6. The digitally controlled low dropout regulator according to claim 5 , further comprising
an inverter; and
a stop switch, wherein
output of the inverter is connected to a gate of the stop switch, and
in order to stop the other of the plurality of AD converters, a gate potential of the stop switch is fixed at a potential at which the stop switch is turned off, and the comparator included in the other of the plurality of AD converters is stopped.

7. The digitally controlled low dropout regulator according to claim 1 , wherein
the impedance variable circuit includes a plurality of impedance elements, and
the respective first signals from the plurality of AD converters are input to each of the plurality of impedance elements, and ON-OFF switching is performed with respect to each of the plurality of impedance elements according to values of the first signals.

Assignees

• Sony Semiconductor Solutions Corp

Inventors

• Ide Daisuke
• Shigyo Nobuhiko
• KOMAGATA Keita
• Watanabe Hiroyuki
• Naito Takahiro

Classifications

• G05F1/561 Primary

  Voltage to current converters (amplifiers H03F) · CPC title

• G05F1/56

  using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) · CPC title

• G05F1/575

  characterised by the feedback circuit · CPC title

• H02M1/0045

  Converters combining the concepts of switch-mode regulation and linear regulation, e.g. linear pre-regulator to switching converter, linear and switching converter in parallel, same converter or same transistor operating either in linear or switching mode · CPC title