Methods and apparatus to implement predictive analytics for continuous control system processes

Patent metadata

Field	Value
Publication number	US-11899417-B2
Application number	US-201916401919-A
Country	US
Kind code	B2
Filing date	May 2, 2019
Priority date	May 2, 2019
Publication date	Feb 13, 2024
Grant date	Feb 13, 2024

Abstract

Methods and apparatus to implement predictive analytics for continuous processes are disclosed. An example apparatus includes a virtual batch unit controller to implement a sampling batch on a virtual batch unit. The sampling batch corresponds to a discrete period of time of a continuous control system process. The virtual batch unit includes input and output parameters corresponding to parameters associated with the continuous control system process. The example apparatus further includes a sampling batch analyzer to generate predictive analytic information indicative of a predicted quality of an output of the continuous control system process at an end of the discrete period of time based on an analysis of the sampling batch relative to an analytical model.

First claim

What is claimed is:

1. An apparatus, comprising:
processor circuitry; and
memory storing instructions that, when executed, cause the processor circuitry to:
generate a first pool of historical sampling batches based on historical process data of a first instance of a continuous control system process, a portion of the historical process data associated with at least one of a startup period or a shutdown period of the first instance of the continuous control system process;
generate an analytical model based on the first pool of historical sampling batches;
validate the analytical model based on a second pool of historical sampling batches;
implement a sampling batch on a virtual batch unit, the virtual batch unit to run in parallel with a second instance of the continuous control system process, the sampling batch corresponding to a discrete period of time of the second instance of the continuous control system process, the discrete period of time being shorter than a duration of the second instance of the continuous control system process, the continuous control system process implemented using a continuous process control system, the continuous process control system being different than a batch process control system, the virtual batch unit including input and output parameters corresponding to parameters associated with the continuous control system process;
designate values for initial conditions of the virtual batch unit, different ones of the initial conditions corresponding to different ones of the parameters associated with the continuous control system process, the values for the initial conditions corresponding to values of the parameters associated with the second instance of the continuous control system process at a start of the discrete period of time, the initial conditions being a separate set of inputs for the virtual batch unit that are distinct from the input parameters, the initial conditions to remain fixed throughout the implementation of the sampling batch; and
generate predictive analytic information indicative of a predicted quality of an output of the second instance of the continuous control system process at an end of the discrete period of time based on an analysis of the sampling batch relative to the analytical model, the predictive analytic information to facilitate at least one of maintenance or improvement of at least one of safety, performance, or efficiency of the second instance of the continuous control system process.

2. The apparatus of claim 1 , wherein the processor circuitry is to designate values for initial conditions of the virtual batch unit as corresponding to values of the parameters associated with the second instance of the continuous control system process at a start of the discrete period of time, the initial conditions being separate from the input and output parameters.

3. The apparatus of claim 1 , wherein the discrete period of time is a first discrete period of time and the sampling batch is a first sampling batch, the processor circuitry to implement a second sampling batch on the virtual batch unit, the second sampling batch corresponding to a second discrete period of time of the second instance of the continuous control system process, a start of the second discrete period of time corresponding to an end of the first discrete period of time, the predictive analytic information to indicate the predicted quality of the output of the second instance of the continuous control system process at an end of the second discrete period of time based on an analysis of the second sampling batch relative to the analytical model.

4. The apparatus of claim 3 , wherein the processor circuitry is to cause a quality prediction interface to be rendered, the quality prediction interface graphically representing the predictive analytic information along a timeline corresponding to the first and second discrete periods of time.

5. The apparatus of claim 3 , wherein the first discrete period of time has a same duration as the second discrete period of time.

6. The apparatus of claim 1 , wherein the first pool of historical sampling batches includes:
a first set of historical sampling batches from the historical process data associated with the startup period of at least one of the first instance or other instances of the continuous control system process;
a second set of historical sampling batches from the historical process data associated with a steady state period of at least one of the first instance or the other instances of the continuous control system process; and
a third set of historical sampling batches from the historical process data associated with the shutdown period of at least one of the first instance or the other instances of the continuous control system process.

7. The apparatus of claim 6 , wherein a first temporal spacing between start times of successive ones of the historical sampling batches in the first set of historical sampling batches is less than a second temporal spacing between start times of successive ones of the historical sampling batches in the second set of historical sampling batches.

8. The apparatus of claim 7 , wherein the first temporal spacing is less than a temporal length of the historical sampling batches such that different ones of the historical sampling batches in the first set of historical sampling batches include overlapping portions of the historical process data.

9. The apparatus of claim 6 , wherein a temporal length of ones of the historical sampling batches correspond to a length of the discrete period of time.

10. The apparatus of claim 6 , wherein a number of historical sampling batches in the second set of historical sampling batches is greater than a number of historical sampling batches in the first set of historical sampling batches and greater than a number of historical sampling batches in the third set of historical sampling batches.

11. The apparatus of claim 1 , wherein the processor circuitry is to generate the predictive analytic information without dynamic time warping.

12. The apparatus of claim 1 , wherein the processor circuitry is to approximate a residence time for the second instance of the continuous control system process, the residence time indicative of a duration of time between when particular material is introduced as an input to the second instance of the continuous control system process and when the particular material has been processed into the output of the second instance of the continuous control system process, a length of the discrete period of time based on the residence time.

13. The apparatus of claim 12 , wherein the length of the discrete period of time equals the approximation of the residence time.

14. The apparatus of claim 12 , wherein the length of the discrete period of time is greater than the approximation of the residence time.

15. The apparatus of claim 14 , wherein the length of the discrete period of time is a multiple of the approximation of the residence time ranging from two to four times the approximation of the residence time.

16. The apparatus of claim 1 , wherein the processor circuitry is to:
generate a second pool of historical sampling batches based on historical process data of the second instance of the continuous control system process; and
update the analytical model based on at least the second pool of historical sampling batches.

17. A non-transitory computer readable medium comprising instructions that, when executed, cause a machine to at least:
generate a first pool of historical sampling batches based on

Assignees

• Fisher Rosemount Systems Inc

Inventors

• Jin Zuwei

Classifications

• G05B19/042 Primary

  using digital processors (G05B19/05 takes precedence) · CPC title

• G06N5/02

  Knowledge representation; Symbolic representation · CPC title

• G05B2219/24075

  Predict control element state changes, event changes · CPC title

• G05B11/06 Primary

  in which the output signal represents a continuous function of the deviation from the desired value, i.e. continuous controllers (G05B11/26 takes precedence) · CPC title

• G05B23/0243 Primary

  model based detection method, e.g. first-principles knowledge model · CPC title