Power management in a multiple-processor computing device

Patent metadata

Field	Value
Publication number	US-11886262-B2
Application number	US-202117306654-A
Country	US
Kind code	B2
Filing date	May 3, 2021
Priority date	Aug 21, 2018
Publication date	Jan 30, 2024
Grant date	Jan 30, 2024

Abstract

A method for managing power in a multiple processor computing device includes detecting a first amount of power being used by a first processor of the computing device; determining an amount of extra power available based on the first amount of power and a power budget for the first processor; and transmits a value to a driver associated with a second processor of the computing device, wherein the value indicates the amount of extra power available, wherein the driver adjusts at least one operating parameter of the second processor based on the amount of extra power available.

First claim

What is claimed is:

1. A computer-implemented method for managing power in a multiple processor computing device, the method comprising:
detecting a first amount of power used by one or more non-processor system components of the computing device;
causing one or more other components of the computing device to be put to sleep;
determining a first amount of extra power available based on a difference between the first amount of power and a system power budget associated with the one or more non-processor system components and the one or more other components; and
transmitting, to a driver associated with a first processor included in the computing device, a first value indicating the first amount of extra power available, wherein the driver adjusts at least one operating parameter of the first processor based on the first amount of extra power available.

2. The computer-implemented method of claim 1 , further comprising determining a second amount of extra power available that indicates a difference between a second amount of power used by a second processor included in the computing device and a processor power budget associated with the second processor.

3. The computer-implemented method of claim 2 , further comprising transmitting, to the driver, a second value indicating the second amount of extra power available, wherein the driver adjusts the at least one operating parameter of the first processor based on the second amount of extra power available.

4. The computer-implemented method of claim 2 , wherein the first processor comprises a graphics processing unit, and the second processor comprises a central processing unit.

5. The computer-implemented method of claim 2 , wherein the computing device also comprises a third processor.

6. The computer-implemented method of claim 2 , wherein the first processor comprises a graphics processing unit or a data processing unit, and the second processor comprises a central processing unit.

7. The computer-implemented method of claim 1 , wherein detecting the first amount of power used by the one or more non-processor system components comprises determining an average amount of power used by the one or more non-processor system components over a time interval.

8. The computer-implemented method of claim 1 , wherein determining the first amount of extra power available comprises limiting the first amount of extra power available based on a maximum allowable power consumption associated with the first processor.

9. The computer-implemented method of claim 1 , wherein the one or more non-processor system components comprise at least one of a keyboard, a touchpad, a display, a cooling fan, an optical drive, a hard disk drive, a solid-state drive, or a network interface.

10. The computer-implemented method of claim 1 , wherein the first processor comprises a graphics processing unit or a data processing unit.

11. A computer-implemented method for managing power in a multiple processor computing device, the method comprising:
detecting a first amount of power being used by a first processor of the computing device;
causing one or more other components of the computing device to be put to sleep;
determining a first amount of extra power available based on a difference between the first amount of power and a power budget for the first processor and the one or more other components; and
transmitting a value to a driver associated with a second processor of the computing device, wherein the value indicates the first amount of extra power available, and wherein the driver adjusts one or more operating parameters of the second processor based on the first amount of extra power available.

12. The computer-implemented method of claim 11 , wherein the first processor comprises at least one of a central processing unit, a data processing unit, or a parallel processing unit, and the second processor comprises at least one of a central processing unit, a data processing unit, or a parallel processing unit.

13. The computer-implemented method of claim 11 , further comprising determining a second amount of extra power available that indicates a difference between a second amount of power being used by a third processor of the computing device and a power budget for the third processor, and transmitting another value to the driver associated with the second processor that indicates the second amount of extra power available, wherein the driver adjusts the one or more operating parameters of the second processor based on the second amount of extra power available.

14. The computer-implemented method of claim 13 , wherein the driver associated with the second processor is configured to cause the second processor to overclock when either the first amount of extra power available or the second amount of extra power available is greater than zero.

15. The computer-implemented method of claim 13 , wherein the first processor comprises a central processing unit, the second processor comprises at least one of a data processing unit or a parallel processing unit, and the third processor comprises at least one of a data processing unit or a parallel processing unit.

16. The computer-implemented method of claim 11 , wherein detecting the first amount of power being used by the first processor comprises polling a register of the first processor.

17. The computer-implemented method of claim 11 , wherein the driver associated with the second processor is configured to cause the second processor to overclock when the first amount of extra power available is greater than zero.

18. The computer-implemented method of claim 11 , wherein the one or more operating parameters of the second processor comprise a clock speed of the second processor.

19. The computer-implemented method of claim 11 , wherein the first processor comprises a central processing unit, and the second processor comprises a graphics processing unit or a data processing unit.

20. A system, comprising:
a first processor coupled to a printed circuit board;
a second processor coupled to the printed circuit board; and
a controller that distributes extra available power from the first processor to the second processor when the system is in operation by:
detecting a first amount of power being used by the first processor;
causing one or more other components of the computing device to be put to sleep;
determining a first amount of extra power available based on a difference between the first amount of power and a power budget associated with the first processor and the one or more other components; and
transmitting, to a driver associated with the second processor, a first value indicating the first amount of extra power available, wherein the driver adjusts at least one operating parameter of the second processor based on the first amount of extra power available.

21. The system of claim 20 , wherein the first processor comprises a central processing unit, and the second processor comprises either a parallel processing unit or a data processing unit.

22. The system of claim 20 , further comprising a driver associated with the second processor that adjusts one or more operating parameters of the second third processor in order to consume the extra available power.

Assignees

• Nvidia Corp

Inventors

• Li Sau Yan Keith
• Dewey Thomas E
• Chen Arthur
• Lai Simon
• Pabalkar Amit
• Nayak Santosh

Classifications

• G06F1/26 Primary

  Power supply means, e.g. regulation thereof (for memories G11C) · CPC title

• G06F1/08

  Clock generators with changeable or programmable clock frequency · CPC title

• G06F9/4411

  Configuring for operating with peripheral devices; Loading of device drivers · CPC title

• G06F9/5094 Primary

  where the allocation takes into account power or heat criteria (power management in computers in general G06F1/3203; thermal management in computers in general G06F1/206) · CPC title

• G06F1/3206 Primary

  Monitoring of events, devices or parameters that trigger a change in power modality · CPC title