Display panel and display apparatus

Patent metadata

Field	Value
Publication number	US-11882747-B2
Application number	US-202017138790-A
Country	US
Kind code	B2
Filing date	Dec 30, 2020
Priority date	Oct 23, 2020
Publication date	Jan 23, 2024
Grant date	Jan 23, 2024

Abstract

Provided are a display panel and a display apparatus. The display panel includes a normal display region and a functional region. The normal display region includes a first display region, a second display region and a third display region. Along a first direction, lengths of third, first and second display regions of the normal display region decrease. One of the first and third display regions is a specific display region where first semiconductor pattern layers are located. The first semiconductor pattern layers are arranged along a third direction and connected to each other. In the second display region, the second semiconductor pattern layers first semiconductor pattern layers is arranged along a third direction and connected to each other. The second semiconductor pattern layers are connected to the first semiconductor pattern layers.

First claim

What is claimed is:

1. A display panel, comprising:
a normal display region comprising a first display region, a second display region and a third display region; and
a functional region,
wherein along a first direction, a length of the second display region is smaller than a length of the first display region and smaller than a length of the third display region, and the length of the first display region is smaller than the length of the third display region,
wherein a density of sub-pixels located in the functional region is smaller than a density of sub-pixels located in the normal display region; the second display region, the functional region, and the first display region are sequentially adjacent to each other along the first direction; the functional region and at least one of the first display region or the second display region are adjacent to the third display region along a second direction, and the first direction intersects the second direction,
wherein the first display region is a specific display region, a plurality of first pixel circuits is located in the specific display region, a plurality of first semiconductor pattern layers is provided in the plurality of first pixel circuits, the plurality of first semiconductor pattern layers is arranged along a third direction and connected to each other, and a first angle α included between the third direction and the first direction satisfies 90°>α≥0°,
wherein a plurality of second pixel circuits is located in the second display region, a plurality of second semiconductor pattern layers is provided in the plurality of second pixel circuits in one-to-one correspondence, the plurality of second semiconductor pattern layers is arranged along a fourth direction and connected to each other, a second angle β included between the fourth direction and the first direction satisfies 90°>β≥0°,
wherein the plurality of second semiconductor pattern layers that is arranged along the fourth direction and connected to each other is connected to the plurality of first semiconductor pattern layers that is arranged along the third direction and connected to each other, and
wherein one second semiconductor pattern layer of the plurality of second semiconductor pattern layers that is located in the second display region is, by the functional region, spaced apart from one first semiconductor pattern layer of the plurality of first semiconductor pattern layers that is located in the specific display region, and the one second semiconductor pattern layer is connected to the one first semiconductor pattern layer and the functional region comprises a light-transmitting region and a transition region surrounding the light-transmitting region;
wherein at least one connecting semiconductor is provided in the transition region, and through the at least one connecting semiconductor, the plurality of second semiconductor pattern layers that is arranged along the fourth direction and connected to each other is connected to the plurality of first semiconductor pattern layers that is arranged along the third direction and connected to each other; and
wherein each of the at least one connecting semiconductor is connected to at least two of the plurality of second semiconductor pattern layers that are located in the second display region and adjacent to the functional region, and connected to at least two of the plurality of first semiconductor pattern layers that are located in the first display region and adjacent to the functional region.

2. The display panel according to claim 1 , wherein a metal wiring group is provided in the transition region, and comprises a plurality of metal wirings.

3. The display panel according to claim 2 , wherein in a thickness direction of the display panel, the metal wiring group covers the at least one connecting semiconductor.

4. The display panel according to claim 1 , wherein a density of sub-pixels located in the light-transmitting region is zero.

5. The display panel according to claim 4 , wherein the light-transmitting region is a hollow region of the display panel.

6. The display panel according to claim 4 , wherein the light-transmitting region is a non-hollowed region of the display panel.

7. The display panel according to claim 1 , wherein a density of sub-pixels located in the light-transmitting region is greater than zero.

8. The display panel according to claim 1 , wherein a number of second pixel circuits of the plurality of second pixel circuits arranged along the first direction in the second display region is M, and a number of first pixel circuits of the plurality of first pixel circuits arranged along the first direction in the specific display region is N, where both M and N are positive integers greater than or equal to 2, and satisfy 50≥N/M≥12.

9. The display panel according to claim 1 , wherein the plurality of first semiconductor pattern layers and the plurality of second semiconductor pattern layers are each made of polysilicon or metal oxide semiconductor.

10. A display panel, comprising:
a normal display region comprising a first display region, a second display region and a third display region; and
a functional region,
wherein along a first direction, a length of the second display region is smaller than a length of the first display region and smaller than a length of the third display region, and the length of the first display region is smaller than the length of the third display region,
wherein a density of sub-pixels located in the functional region is smaller than a density of sub-pixels located in the normal display region; the second display region, the functional region, and the first display region are sequentially adjacent to each other along the first direction; the functional region and at least one of the first display region or the second display region are adjacent to the third display region along a second direction, and the first direction intersects the second direction,
wherein the first display region is a specific display region, a plurality of first pixel circuits is located in the specific display region, a plurality of first semiconductor pattern layers is provided in the plurality of first pixel circuits, the plurality of first semiconductor pattern layers is arranged along a third direction and connected to each other, and a first angle α included between the third direction and the first direction satisfies 90°>α≥0°,
wherein a plurality of second pixel circuits is located in the second display region, a plurality of second semiconductor pattern layers is provided in the plurality of second pixel circuits in one-to-one correspondence, the plurality of second semiconductor pattern layers is arranged along a fourth direction and connected to each other, a second angle β included between the fourth direction and the first direction satisfies 90°>β≥0°,
wherein the plurality of second semiconductor pattern layers that is arranged along the fourth direction and connected to each other is connected to the plurality of first semiconductor pattern layers that is arranged along the third direction and connected to each other, and
wherein one second semiconductor pattern layer of the plurality of second semiconductor pattern layers that is located in the second display region is, by the functional region, spaced apart from one first semiconductor pattern layer of the plurality of first semiconductor pattern layers that is located in the specific display region, and the one second semiconductor pattern layer is connected to the one first semiconductor pattern layer, and the functional region comprises a light-transmitting region and a transition region surrounding the light-transmitting region;
wherein at le

Assignees

• Wuhan Tianma Micro Electronics Co Ltd

Inventors

• Hou Xueshun
• Xiang Dongxu
• Li Yuan
• Peng Tao

Classifications

• H10K59/131

  Interconnections, e.g. wiring lines or terminals · CPC title

• H10K59/123

  Connection of the pixel electrodes to the thin film transistors [TFT] · CPC title

• H10K59/1213 Primary

  the pixel elements being TFTs · CPC title

• H10K59/873

  Encapsulations · CPC title

• H10K59/65

  OLEDs integrated with inorganic image sensors · CPC title