Overcurrent protection circuit, display apparatus and driver circuit thereof, and overcurrent protection method

Patent metadata

Field	Value
Publication number	US-11875713-B2
Application number	US-202117781288-A
Country	US
Kind code	B2
Filing date	May 17, 2021
Priority date	Jun 17, 2020
Publication date	Jan 16, 2024
Grant date	Jan 16, 2024

Abstract

An overcurrent protection circuit includes: a sampling sub-circuit configured to acquire gate input signals, select a gate input signal with a voltage value greater than a first preset voltage value as a sample gate input signal, generate a first control signal according to the sample gate input signal, and output the first control signal; a delay determination sub-circuit configured to receive the first control signal, delay the first control signal for a first preset time, determine whether a voltage value of the first control signal after delay is less than a voltage value of the first control signal before the delay, and if not, output a counting signal; and a counting control sub-circuit configured to receive the counting signal, perform counting according to the counting signal, and if a counted number reaches a preset number, output a second control signal.

First claim

What is claimed is:

1. An overcurrent protection circuit, configured to continuously detect a plurality of gate input signals input to a gate driver circuit, the overcurrent protection circuit comprising:
a sampling sub-circuit configured to: acquire the plurality of gate input signals; select a gate input signal with a voltage value greater than a first preset voltage value in the plurality of gate input signals as a sample gate input signal; and generate a first control signal according to the sample gate input signal, and output the first control signal, wherein the first preset voltage value is a critical voltage value at which a transition between a normal state and an overcurrent state of a voltage of a gate input signal occurs;
a delay determination sub-circuit coupled to the sampling sub-circuit, the delay determination sub-circuit being configured to: receive the first control signal output by the sampling sub-circuit; delay the first control signal for a first preset time; determine whether a voltage value of the first control signal after delay is less than a voltage value of the first control signal before the delay; and if the voltage value of the first control signal after the delay is not less than the voltage value of the first control signal before the delay, output a counting signal; and
a counting control sub-circuit coupled to the delay determination sub-circuit, the counting control sub-circuit being configured to: receive the counting signal output by the delay determination sub-circuit; perform counting according to the counting signal; and if a counted number reaches a preset number, output a second control signal, the second control signal being used for cutting off of inputting of a signal from a system board of a display apparatus to a driver circuit of the display apparatus; wherein
the sampling sub-circuit includes a signal selection unit;
the signal selection unit is configured to receive the plurality of gate input signals, and select the gate input signal with the voltage value greater than the first preset voltage value in the plurality of gate input signals as the sample gate input signal.

2. The overcurrent protection circuit according to claim 1 , wherein the sampling sub-circuit further includes a signal processing unit coupled to the signal selection unit;
the signal processing unit is configured to receive the sample gate input signal output by the signal selection unit, perform de-interference processing and amplification processing on the sample gate input signal, generate the first control signal according to the de-interfered and amplified sample gate input signal and a second preset voltage value, and output the first control signal; wherein
the second preset voltage value is related to an amplification factor for performing the de-interference processing and the amplification processing on the sample gate input signal.

3. The overcurrent protection circuit according to claim 2 , wherein the signal processing unit includes:
a noise reduction sub-unit, the noise reduction sub-unit being configured to receive the sample gate input signal output by the signal selection unit, perform the de-interference processing on the sample gate input signal, and output the de-interfered sample gate input signal;
an amplification sub-unit coupled to the noise reduction sub-unit, the amplification sub-unit being configured to receive the de-interfered sample gate input signal output by the noise reduction sub-unit, perform the amplification processing on the de-interfered sample gate input signal, and output the de-interfered and amplified sample gate input signal; and
a comparison sub-unit coupled to the amplification sub-unit, the comparison sub-unit being configured to receive the de-interfered and amplified sample gate input signal output by the amplification sub-unit, generate the first control signal according to the de-interfered and amplified sample gate input signal and the second preset voltage value, and output the first control signal.

4. An overcurrent protection circuit, configured to continuously detect a plurality of gate input signals input to a gate driver circuit, the overcurrent protection circuit comprising:
a sampling sub-circuit configured to: acquire the plurality of gate input signals; select a gate input signal with a voltage value greater than a first preset voltage value in the plurality of gate input signals as a sample gate input signal; and generate a first control signal according to the sample gate input signal, and output the first control signal, wherein the first preset voltage value is a critical voltage value at which a transition between a normal state and an overcurrent state of a voltage of a gate input signal occurs;
a delay determination sub-circuit coupled to the sampling sub-circuit, the delay determination sub-circuit being configured to: receive the first control signal output by the sampling sub-circuit delay the first control signal for a first preset time; determine whether a voltage value of the first control signal after delay is less than a voltage value of the first control signal before the delay; and if the voltage value of the first control signal after the delay is not less than the voltage value of the first control signal before the delay, output a counting signal; and
a counting control sub-circuit coupled to the delay determination sub-circuit, the counting control sub-circuit being configured to: receive the counting signal output by the delay determination sub-circuit perform counting according to the counting signal; and if a counted number reaches a preset number, output a second control signal, the second control signal being used for cutting off of inputting of a signal from a system board of a display apparatus to a driver circuit of the display apparatus; wherein
the sampling sub-circuit includes a signal selection unit; and the signal selection unit is configured to receive the plurality of gate input signals, select a gate input signal with a greatest voltage value in the plurality of gate input signals, compare the voltage value of the selected gate input signal with the first preset voltage value, and if the voltage value of the selected gate input signal is greater than the first preset voltage value, use the selected gate input signal as the sample gate input signal.

5. The overcurrent protection circuit according to claim 4 , wherein a number of the plurality of gate input signals is x, the signal selection unit includes n stages of selector groups, and a selector group in an i-th stage includes 2 (n-i) electors, wherein x is a positive integer greater than or equal to 3, n is a positive integer greater than or equal to 2, and i takes a value in a positive integer set of [1, n] in sequence;
each selector has two input terminals and one output terminal; two input terminals of a selector in a selector group in an (i+1)-th stage are coupled to output terminals of two selectors in the selector group in the i-th stage, respectively;
a selector group in a first stage is configured to acquire the plurality of gate input signals, and each selector in the selector group in the first stage is configured to receive two gate input signals in the plurality of gate input signals, and output a gate input signal with a greater voltage value in the received two gate input signals in the plurality of gate input signals;
the selector group in the (i+1)-th stage is configured to receive gate input signals output by the selector group in the i-th stage, and each selector in the selector group in the (i+1)-th stage is configured to receive two gate input signals in the gate input signals output by the selector group in the i-th stage, and output a gate input signal with a greater voltage value in the received two gate input signals in t

Assignees

• Hefei Xinsheng Optoelectronics Technology Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Yuan Xianfeng
• Wang Jianjun
• Liu Xiaoshi
• Xu Junbo
• Wang Rui
• Liu Yuanyuan
• Qiao Xuanxuan

Classifications

• G09G3/006 Primary

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