Display substrate and display device

Patent metadata

Field	Value
Publication number	US-11871606-B2
Application number	US-202017279872-A
Country	US
Kind code	B2
Filing date	Jul 22, 2020
Priority date	Jul 29, 2019
Publication date	Jan 9, 2024
Grant date	Jan 9, 2024

Abstract

A display substrate has at least one display region and at least one non-display region, and a non-display region is located at at least one side of a display region. The display substrate includes a base, a plurality of light-emitting devices, and an encapsulation layer. The plurality of light-emitting devices are located in the at least one display region and disposed on a side of the base. The encapsulation layer is disposed on a side of the plurality of light-emitting devices facing away from the base, and configured to encapsulate the plurality of light-emitting devices. A surface, proximate to the base, of a portion of the encapsulation layer located in the non-display region is unevenly arranged.

First claim

What is claimed is:

1. A display substrate having at least one display region and at least one non-display region, a non-display region being located at at least one side of a display region, the display substrate comprising:
a base;
a plurality of light-emitting devices located in the at least one display region and disposed on a side of the base; and
an encapsulation layer disposed on a side, facing away from the base, of the plurality of light-emitting devices, and configured to encapsulate the plurality of light-emitting devices, wherein
a surface, proximate to the base, of a portion of the encapsulation layer located in the non-display region is unevenly arranged;
the display substrate further comprising a dielectric layer located in the at least one non-display region and disposed between the base and the encapsulation layer, wherein
a surface, facing away from the base of a portion of the dielectric layer located in the non-display region has a plurality of first grooves, the surface, proximate to the base, of the portion of the encapsulation layer located in the non-display region has a plurality of first protrusions, the plurality of first protrusions are in one-to-one correspondence with the plurality of first grooves, and an orthogonal projection of each first protrusion on the base is located within an orthogonal projection of corresponding first groove on the base;
wherein the display substrate has a plurality of pixel regions and non-pixel regions, a non-pixel region is located at at least one side of a pixel region; the plurality of pixel regions are arranged in an array, and the pixel region includes the display region and the non-display region; the non-pixel region includes a connection region and an opening region;
the display substrate further comprises a plurality of signal connection lines located in the connection region and a plurality of signal control lines located in the pixel region; at least one end of each signal connection line is connected to at least one corresponding signal control line in at least one adjacent pixel region;
portions, located in opening regions, of the base, the encapsulation layer, and any thin film located between the base and the encapsulation layer are hollowed; portions, located in connection regions, of the encapsulation layer are located on a side, facing away from the base, of the plurality of signal connection lines.

2. The display substrate according to claim 1 , wherein the non-display region is located between the display region and the connection region; the display substrate further comprises at least one barrier member located in the non-display region;
the at least one barrier member is disposed on a side, proximate to the base, of the encapsulation layer, and is configured to block a deformation crack from propagating from the connection region to the display region in a case where the deformation crack appears in a portion, located in the connection region, of the encapsulation layer.

3. The display substrate according to claim 2 , wherein the surface, facing away from the base, of the portion of the dielectric layer located in the non-display region has at least one fixing groove, a fixing groove in the at least one fixing groove is matched with a barrier member in the at least one barrier member;
the barrier member includes a first sub-portion and a second sub-portion that are connected along a direction perpendicular to a surface of the base facing the encapsulation layer, wherein
the first sub-portion is located in the fixing groove; the second sub-portion extends in a direction away from the first sub-portion; and a height of the second sub-portion in the direction perpendicular to the surface of the base facing the encapsulation layer is not less than a distance of a surface, proximate to the base, of the portion of the encapsulation layer located in the connection region from a surface of the second sub-portion proximate to the base in the same direction.

4. The display substrate according to claim 3 , wherein an area of a cross-section of the second sub-portion taken along a plane parallel to the surface of the base facing the encapsulation layer gradually increases in a direction away from the base.

5. The display substrate according to claim 3 , wherein a shape of a longitudinal section of the second sub-portion in a first direction is an inverted trapezoid, the first direction being a direction pointing from the non-display region to the connection region.

6. The display substrate according to claim 3 , wherein the height of the second sub-portion in the direction perpendicular to the surface of the base facing the encapsulation layer is 2 μm to 4 μm.

7. The display substrate according to claim 2 , wherein the at least one barrier member includes at least one loop-shaped barrier member; and an inner boundary of an orthogonal projection of the loop-shaped barrier member on the base is located outside of the display region.

8. The display substrate according to claim 1 , further comprising:
at least one insulating layer located between the dielectric layer and the base, portions, located in the opening regions, of the at least one insulating layer being hollowed; and
an etching protection layer located between the dielectric layer and the encapsulation layer and covering at least a surface, proximate to the encapsulation layer, of the dielectric layer, the etching protection layer being configured to protect at least one thin film located outside of the opening regions from being etched away during a process of hollowing out the opening regions.

9. The display substrate according to claim 8 , wherein a surface, facing away from the base, of a portion of the etching protection layer located in the non-display region has a plurality of second grooves, the plurality of second grooves are in one-to-one correspondence with the plurality of first protrusions of the encapsulation layer, and each first protrusion is located in a corresponding second groove.

10. The display substrate according to claim 1 , further comprising a first signal line protection layer and a second signal line protection layer that are disposed on both sides of the plurality of signal connection lines in a direction perpendicular to a surface of the base facing the encapsulation layer, the first signal line protection layer and the second signal line protection layer being both made of an organic material.

11. The display substrate according to claim 10 , wherein the second signal line protection layer is located on a surface, proximate to the base, of the plurality of signal connection lines;
the display substrate further comprises a barrier layer located between the base and the second signal line protection layer;
the barrier layer is made of an inorganic material, and a thickness of a portion of the barrier layer located in the connection region is less than a thickness of a portion of the barrier layer located in the pixel region.

12. The display substrate according to claim 11 , wherein the portion of the barrier layer located in the connection region has a third groove, and the second signal line protection layer is located in the third groove; a depth of the third groove is less than or equal to the thickness of the portion of the barrier layer located in the pixel region.

13. The display substrate according to claim 1 , further comprising a base film, wherein the base film is made of an elastic material; and the base film is fixed on a surface of the base facing away from the encapsulation layer through an adhesive layer.

14. The display substrate according to claim 1 , wherein

Assignees

• Boe Technology Group Co Ltd

Inventors

• Xue Jinxiang
• Wang Guoqiang
• Sun Zhongyuan
• Liu Wenqi
• Ni Jingkai
• Sui Kai
• Wang Xiaofen
• Zhou Xiang
• Dong Chao
• Yuan Guangcai

Classifications

• H10K59/873 Primary

  Encapsulations · CPC title

• H10K59/131

  Interconnections, e.g. wiring lines or terminals · CPC title

• H10K50/844 Primary

  Encapsulations · CPC title

• H10K59/124 Primary

  Insulating layers formed between TFT elements and OLED elements · CPC title

• H10K59/121

  characterised by the geometry or disposition of pixel elements · CPC title