Demodulator and wireless receiver including the same

Patent metadata

Field	Value
Publication number	US-11870394-B2
Application number	US-202017597123-A
Country	US
Kind code	B2
Filing date	May 25, 2020
Priority date	Jul 2, 2019
Publication date	Jan 9, 2024
Grant date	Jan 9, 2024

Abstract

There is provided a demodulator that makes it possible to reduce or avoid deterioration in demodulation performance due to nonlinearity of input amplitude-frequency characteristics of a variable capacitive element included in an analog control signal input section of a frequency variable oscillator, while suppressing an influence of noise. The demodulator includes: a low-resolution A/D converter that performs analog-digital conversion of a first phase difference signal to generate a second phase difference signal that is digital; a low-resolution D/A converter that performs digital-analog conversion of the second phase difference signal to generate a third phase difference signal; an analog subtractor that subtracts the third phase difference signal from the first phase difference signal to generate a first control signal; an ADPLL that generates a second control signal; and an FVO that generates the oscillation signal on the basis of the first control signal and the second control signal.

First claim

The invention claimed is:

1. A demodulator, comprising:
a phase difference signal generator that generates a first phase difference signal representing a phase difference between a digitally modulated digital modulation signal and an oscillation signal;
a low-resolution A/D converter that performs analog-digital conversion of the first phase difference signal with a resolution lower than at least a resolution of a digital demodulation signal, which is a final output, to generate a second phase difference signal that is digital;
a D/A converter that performs digital-analog conversion of the second phase difference signal to generate a third phase difference signal that is analog;
a first control signal generator that subtracts the third phase difference signal from the first phase difference signal to generate a first control signal that is analog;
a second control signal generator that generates, on a basis of a reference signal and the oscillation signal, a second control signal that is analog or digital and has a phase opposite to a phase of the first control signal;
a frequency variable oscillator that generates the oscillation signal on a basis of the first control signal and the second control signal; and
a digital demodulation signal generator that demodulates the digital modulation signal on a basis of the second control signal.

2. The demodulator according to claim 1 , wherein
the frequency variable oscillator includes a first input section and a second input section, the first input section being an input section for the first control signal that includes a variable capacitive element, and the second input section being an input section for the second control signal that includes a capacitive element and is coupled in parallel to the first input section, and
a resolution of the low-resolution A/D converter is set to a resolution that allows for generation of the first control signal having an amplitude falling within a linear region of input amplitude-frequency characteristics of the variable capacitive element.

3. The demodulator according to claim 2 , wherein
the second control signal generator includes an ADPLL (ALL-Digital Phase Locked Loop) circuit, and is configured to generate a digital signal as the second control signal,
the second input section has a configuration in which a least a same number of signal input sections as a bit number of the second control signal are coupled in parallel to each other, the signal input sections each including a capacitive element having a fixed capacitance,
the frequency variable oscillator is configured to generate the oscillation signal on a basis of the first control signal that is analog and is inputted to the first input section, and the second control signal that is digital and is inputted to the second input section, and
the digital demodulation signal generator is configured to demodulate the digital modulation signal on a basis of a signal obtained by subtracting the second phase difference signal from the second control signal that is digital.

4. The demodulator according to claim 2 , wherein
the second control signal generator includes an analog PLL (Phase Locked Loop) circuit, and is configured to generate an analog signal as the second control signal,
the frequency variable oscillator has a configuration in which the second input section includes a variable capacitive element as the capacitive element, and is configured to generate the oscillation signal on a basis of the first control signal that is analog and is inputted to the first input section, and the second control signal that is analog and is inputted to the second input section, and
the digital demodulation signal generator is configured to perform A/D conversion of the second control signal that is analog to generate a second control signal that is digital, and demodulate the digital modulation signal on a basis of a signal obtained by subtracting the second phase difference signal from the generated second control signal that is digital.

5. The demodulator according to claim 2 , wherein
the second control signal generator includes an analog PLL (Phase Locked Loop) circuit, and is configured to generate an analog signal as the second control signal,
the frequency variable oscillator has a configuration in which the second input section includes a variable capacitive element as the capacitive element, and is configured to generate the oscillation signal on a basis of the first control signal that is analog and is inputted to the first input section, and the second control signal that is analog and is inputted to the second input section, and
the digital demodulation signal generator is configured to generate a difference signal by subtracting the third phase difference signal from the second control signal that is analog, and demodulate the digital modulation signal on a basis of a signal obtained by performing A/D conversion of the generated difference signal.

6. The demodulator according to claim 1 , wherein the digital modulation signal comprises at least one of an FSK (Frequency Shift Keying) signal or a PSK (Phase-Shift Keying) signal.

7. A demodulator, comprising:
a phase difference signal generator that generates a first phase difference signal representing a phase difference between a digitally modulated digital modulation signal and an oscillation signal;
a low-resolution A/D converter that performs analog-digital conversion of the first phase difference signal with a resolution lower than at least a resolution of a digital demodulation signal, which is a final output, to generate a second phase difference signal that is digital;
a D/A converter that performs digital-analog conversion of the second phase difference signal to generate a third phase difference signal that is analog;
a first control signal generator that subtracts the third phase difference signal from the first phase difference signal to generate a first control signal that is analog;
a second control signal generator that generates, on a basis of a reference signal and the oscillation signal, a fourth phase difference signal that is digital and has a phase opposite to a phase of the first phase difference signal, and adds the second phase difference signal to the fourth phase difference signal to generate a second control signal that is digital and has a phase opposite to a phase of the first control signal;
a frequency variable oscillator that generates the oscillation signal on a basis of the first control signal and the second control signal; and
a digital demodulation signal generator that demodulates the digital modulation signal on a basis of the fourth phase difference signal.

8. The demodulator according to claim 7 , wherein
the frequency variable oscillator includes a first input section and a second input section, the first input section being an input section for the first control signal that includes a variable capacitive element, and the second input section being an input section for the second control signal that is coupled in parallel to the first input section,
the second input section has a configuration in which at least a same number of signal input sections as a bit number of the second control signal are coupled in parallel to each other, the signal input sections each including a capacitive element having a fixed capacitance, and
a resolution of the low-resolution A/D converter is set to a resolution that allows for generation of the first control signal having an amplitude falling within a linear region of input amplitude-frequency characteristics of the variable capacitive element.

9. The demodulator according to claim 7 , wherein
the second control signal generator includes
an ADP

Assignees

• Sony Semiconductor Solutions Corp

Inventors

• Shinke Satoru
• Matsumoto Tomohiro

Classifications

• H03D3/00 Primary

  Demodulation of angle-, {frequency- or phase-} modulated oscillations (H03D5/00, H03D9/00, H03D11/00 take precedence) · CPC title

• H03D3/241

  the oscillator being part of a phase locked loop · CPC title

• H04B1/16 Primary

  Circuits · CPC title

• H04L27/14

  Demodulator circuits; Receiver circuits · CPC title

• H04L27/22

  Demodulator circuits; Receiver circuits · CPC title