Display panel
US-2019157363-A1 · May 23, 2019 · US
US11869903B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11869903-B2 |
| Application number | US-202117554078-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 17, 2021 |
| Priority date | Aug 21, 2019 |
| Publication date | Jan 9, 2024 |
| Grant date | Jan 9, 2024 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A method of manufacturing a display apparatus includes forming a first conductive layer on a base substrate including a panel area and a margin area disposed next to the panel area, the margin area including a dummy pattern area, forming a photoresist layer on the first conductive layer, forming a photoresist pattern by exposing and developing the photoresist layer, forming a first conductive pattern by etching the first conductive layer using the photoresist pattern, and removing the photoresist pattern. The forming the first conductive pattern includes forming a first pixel circuit pattern in the panel area, and forming a dummy pattern in the dummy pattern area of the margin area. An opening ratio of a portion where the dummy pattern is not formed with respect to the dummy pattern area is about 30% or more.
Opening claim text (preview).
What is claimed is: 1. A method of manufacturing a display apparatus comprising: forming a thin film transistor in a panel area on a base substrate including the panel area and a margin area disposed next to the panel area; forming a conductive layer on the base substrate on which the thin film transistor is formed; patterning the conductive layer to form a dummy pattern in the margin area and a pixel electrode electrically connected to the thin film transistor in the panel area; forming a light emitting layer and an opposite electrode on the pixel electrode; and cutting the margin area of the base substrate to separate the margin area from the panel area. 2. The method of claim 1 , wherein the forming the conductive layer includes forming a layer containing silver (Ag). 3. The method of claim 1 , wherein the patterning the conductive layer comprises: forming a photoresist layer on the conductive layer; forming a photoresist pattern by exposing and developing the photoresist layer; and forming the pixel electrode and the dummy pattern by etching the conductive layer using the photoresist pattern. 4. The method of claim 3 , wherein the etching the conductive layer includes wet etching the conducive layer using an organic acid based etching solution.
by liquid etching only · CPC title
using masks for conductive or resistive materials · CPC title
Dummy elements, i.e. elements having non-functional features · CPC title
of multiple TFTs · CPC title
wherein the TFTs are in active matrices · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.