Method for operating a processing unit

US11868627B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11868627-B2
Application numberUS-202117217590-A
CountryUS
Kind codeB2
Filing dateMar 30, 2021
Priority dateJun 19, 2020
Publication dateJan 9, 2024
Grant dateJan 9, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for operating a processing unit. The processing unit addresses virtual memory areas in order to access a RAM memory unit and these individual virtual memory areas respectively being mapped onto a physical memory area of the RAM memory unit. A check of the RAM memory unit for errors is performed. If, in the course of this check, a physical memory area of the RAM memory unit is determined to be faulty, this faulty physical memory area is designated as faulty. A check is performed to determine whether a free physical memory area exists in RAM memory unit onto which no virtual memory area is mapped and which is not designated as faulty. If such a free physical memory area exists, the virtual memory area that is currently mapped onto the physical memory area recognized as faulty is henceforth mapped onto this free physical memory area.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for operating a processing unit, the method comprising the following steps: addressing, by the processing unit, virtual memory areas to access a RAM memory unit, each individual virtual memory area of the virtual memory areas being respectively mapped onto a respective physical memory area of the RAM memory unit; performing a check of the RAM memory unit for errors; designating, when, during the check of the RAM memory unit for errors, a physical memory area of the RAM memory unit is determined to have a hardware defect, the physical memory area having the hardware defect as faulty; performing a check to determine whether a free physical memory area exists in the RAM memory unit onto which no virtual memory area is mapped and which is not designated as faulty; mapping, when the free physical memory area exists, a virtual memory area, currently mapped onto the physical memory area determined to have the hardware defect and designated as faulty, to the free physical memory area; and when the free physical memory area does not exist: determining, depending on which concrete processes executing in the processing unit access the individual virtual memory areas, whether the virtual memory area currently mapped onto the physical memory determined to have the hardware defect and designated as faulty should be mapped onto another one of the respective physical memory areas, and based on the determination, selecting a process of the concrete processes to deactivate, deactivating the selected concrete process, and mapping the virtual memory area currently mapped onto the physical memory area determined to have the hardware defect and designated as faulty, to the respective physical memory area onto which a virtual memory area of the individual virtual memory areas accessed by the selected concrete process is mapped. 2. The method as recited in claim 1 , wherein an error detection method is performed in order to detect whether individual physical memory areas of the RAM memory unit have a hardware defect. 3. The method as recited in claim 1 , wherein the physical memory area is designated as faulty when the physical memory area has an irreparable hardware defect. 4. The method as recited in claim 1 , wherein the individual virtual memory areas are mapped onto the respective physical memory areas using a memory management table. 5. The method as recited in claim 4 , wherein, to map the virtual memory area that is currently mapped onto the physical memory area designated as faulty onto the free physical memory area or onto another of the physical memory areas, a corresponding entry in the memory management table is changed. 6. The method as recited in claim 1 , wherein: the individual virtual memory areas are mapped onto the respective physical memory areas using a memory management table stored in nonvolatile memory; the designating includes designating, in a further table stored in nonvolatile memory or in or configuration file stored in nonvolatile memory, the physical memory area of the RAM memory determined to have the hardware defect as faulty; and the mapping to the free physical memory area includes changing the memory management table to map the virtual memory area currently mapped onto the physical memory area determined to have the hardware defect and designated as faulty to the free physical memory area. 7. A processing unit configured to: perform a check of a RAM memory unit for errors; designate, when, during the check of the RAM memory unit for errors, a physical memory area of the RAM memory unit is determined to have a hardware defect, the physical memory area having the hardware defect as faulty; perform a check to determine whether a free physical memory area exists in the RAM memory unit onto which no virtual memory area is mapped and which is not designated as faulty; map, when the free physical memory area exists, a virtual memory area, currently mapped onto the physical memory area determined to have the hardware defect and designated as faulty, to the free physical memory area; and when the free physical memory area does not exist: determine, depending on which concrete processes executing in the processing unit access the individual virtual memory areas, whether the virtual memory area currently mapped onto the physical memory determined to have the hardware defect and designated as faulty should be mapped onto another one of the respective physical memory areas, and based on the determination, select a process of the concrete processes to deactivate, deactivate the selected concrete process, and map the virtual memory area currently mapped onto the physical memory area determined to have the hardware defect and designated as faulty, to the respective physical memory area onto which a virtual memory area of the individual virtual memory areas accessed by the selected concrete process is mapped. 8. A non-transitory machine-readable storage medium on which is stored a computer program for operating a processing unit, the computer program, when executed by a computer, causing the computer to perform the following steps: addressing, by the processing unit, virtual memory areas to access a RAM memory unit, each individual virtual memory area of the virtual memory areas being respectively mapped onto a respective physical memory area of the RAM memory unit; performing a check of the RAM memory unit for errors; designating, when, during the check of the RAM memory unit for errors, a physical memory area of the RAM memory unit is determined to have a hardware defect, the physical memory area having the hardware defect as faulty; performing a check to determine whether a free physical memory area exists in the RAM memory unit onto which no virtual memory area is mapped and which is not designated as faulty; mapping, when the free physical memory area exists, a virtual memory area currently mapped onto the physical memory area determined to have the hardware defect and designated as faulty, to the free physical memory area; and when the free physical memory area does not exist: determining, depending on which concrete processes executing in the processing unit access the individual virtual memory areas, whether the virtual memory area currently mapped onto the physical memory determined to have the hardware defect and designated as faulty should be mapped onto another one of the respective physical memory areas, and based on the determination, selecting a process of the concrete processes to deactivate, deactivating the selected concrete process, and mapping the virtual memory area currently mapped onto the physical memory area determined to have the hardware defect and designated as faulty, to the respective physical memory area onto which a virtual memory area of the individual virtual memory areas accessed by the selected concrete process is mapped. 9. A method for operating a processing unit, the method comprising the following steps: addressing, by the processing unit, virtual memory areas to access a RAM memory unit, each individual virtual memory area of the virtual memory areas being respectively mapped onto a respective physical memory area of the RAM memory unit; performing a check of the RAM memory unit for errors; designating, when, during the check of the RAM memory unit for errors, a physical memory area of the RAM memory unit is determined to have a hardware defect, the physical memory area having the hardware defect as faulty; performing a check to determine whether a free physical memory area exists in the RAM memory unit onto which no virtual memory area is mapped and which is not designated as faulty; based on the check, determining the free physical memo

Assignees

Inventors

Classifications

  • G06F3/0631Primary

    by allocating resources to storage systems · CPC title

  • Improving or facilitating administration, e.g. storage management · CPC title

  • Single storage device · CPC title

  • Hypervisor-specific management and integration aspects · CPC title

  • where the redundant component is memory or memory area · CPC title

Patent family

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Frequently asked questions

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What does patent US11868627B2 cover?
A method for operating a processing unit. The processing unit addresses virtual memory areas in order to access a RAM memory unit and these individual virtual memory areas respectively being mapped onto a physical memory area of the RAM memory unit. A check of the RAM memory unit for errors is performed. If, in the course of this check, a physical memory area of the RAM memory unit is determine…
Who is the assignee on this patent?
Bosch Gmbh Robert
What technology area does this patent fall under?
Primary CPC classification G06F3/0631. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 09 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).