Systems, devices, and methods for resistance metrology using graphene with superconducting components

Patent metadata

Field	Value
Publication number	US-11867775-B2
Application number	US-202017435807-A
Country	US
Kind code	B2
Filing date	Mar 4, 2020
Priority date	Mar 4, 2019
Publication date	Jan 9, 2024
Grant date	Jan 9, 2024

Abstract

A quantum Hall resistance apparatus is to improve resistance standards and includes a substrate, a graphene epitaxially grown on the substrate and having a plurality of first contact patterns at edges of the graphene, a plurality of contacts, each including a second contact pattern and configured to connect to a corresponding first contact pattern, and a protective layer configured to protect the graphene and to increase adherence between the first contact patterns and the second contact patterns. The contacts become a superconductor at a temperature lower than or equal to a predetermined temperature and under up to a predetermined magnetic flux density.

First claim

What is claimed is:

1. A quantum Hall resistance apparatus to improve resistance standards, the quantum Hall resistance apparatus comprising:
a substrate;
a plurality of Hall bars made of graphene electrical conduction layer, which is epitaxially grown on the substrate, each Hall bar having a plurality of first contact patterns at edges thereof;
a plurality of contacts, each including a second contact pattern and configured to connect to a corresponding first contact pattern; and
a protective layer configured to protect first contact patterns and to increase adherence between the first contact patterns and the second contact patterns,
wherein the plurality of contacts become a superconductor at a temperature lower than or equal to a predetermined temperature and under up to a predetermined magnetic flux density.

2. The quantum Hall resistance apparatus according to claim 1 , wherein each first contact pattern includes at least two extensions therefrom.

3. The quantum Hall resistance apparatus according to claim 2 , wherein each second contact pattern fits to a corresponding first contact pattern.

4. The quantum Hall resistance apparatus according to claim 1 , wherein the predetermined temperature is 12.5 Kelvin.

5. The quantum Hall resistance apparatus according to claim 1 , wherein the predetermined magnetic flux density is 9 Tesla.

6. The quantum Hall resistance apparatus according to claim 1 , wherein the protective layer is formed of palladium and gold.

7. The quantum Hall resistance apparatus according to claim 1 , wherein the plurality of contacts are made of niobium, titanium, nitrogen, or any combination thereof.

8. The quantum Hall resistance apparatus according to claim 1 , wherein the graphene is a mono-layer.

9. The quantum Hall resistance apparatus according to claim 1 , wherein the quantum Hall resistance apparatus is functionalized with chromium tricarbonyl (Cr(CO) 3 ).

10. The quantum Hall resistance apparatus according to claim 1 , wherein the substrate is a 4H—SiC(0001) semi-insulating substrate with a miscut, relative to the (0001) atomic plane of the 4H—SiC(0001), which is less than or equal to 0.10°.

11. The quantum Hall resistance apparatus according to claim 1 , wherein the plurality of contacts with respect to the plurality of Hall bars are connected in series, parallel, or combination thereof to make a resistance standard.

12. A method for making a quantum Hall bar resistance apparatus to improve resistance standards, the method comprising:
providing a substrate;
epitaxially growing a graphene to form an electrical conduction layer on the substrate;
etching the graphene to make a plurality of Hall bars, each including a plurality of first contact patterns at edges thereof;
performing lithographic processes to lay a protective layer configured to protect the plurality of first contact patterns; and
adding a plurality of contacts over the protective layer, each contact having a second contact pattern to connect to a corresponding first contact pattern,
wherein the plurality of contacts become a superconductor at a temperature lower than or equal to a predetermined temperature and under up to a predetermined magnetic flux density.

13. The method according to claim 12 , wherein epitaxially growing the graphene includes:
placing the substrate into a furnace;
purging the substrate with argon; and
step-wisely increasing a temperature in the furnace to 1875° C. at a same rate in environment including argon and hydrogen.

14. The method according to claim 13 , wherein the hydrogen is removed from the furnace at 1050° C.

15. The method according to claim 13 , wherein a silicon face of the substrate is in contact with a polished graphite slab in the furnace.

16. The method according to claim 12 , wherein the predetermined temperature is 12.5 Kelvin.

17. The method according to claim 12 , wherein the predetermined magnetic flux density is 9 Tesla.

18. The method according to claim 12 , wherein the protective layer is formed of palladium and gold.

19. The method according to claim 12 , further comprising:
functionalizing the quantum Hall bar resistance apparatus with chromium tricarbonyl (Cr(CO) 3 ).

20. The method according to claim 12 , wherein the contacts are made of niobium, titanium, nitrogen, and any combination thereof.

21. The method according to claim 12 , further comprising:
mounting the quantum Hall bar resistance apparatus over a leadless chip carrier; and
bonding wires between the quantum Hall bar resistance apparatus and the leadless chip carrier.

22. A quantum Hall resistance apparatus to improve resistance standards, the quantum Hall resistance apparatus comprising:
a substrate;
one or more Hall bars epitaxially grown on the substrate, each Hall bar having a plurality of first contact patterns at edges thereof;
one or more contacts, each including a second contact pattern connected to a corresponding first contact pattern; and
a protective layer between the first contact patterns and the second contact patterns,
wherein the one or more contacts become a superconductor under one or more of the following conditions: (i) at a temperature of 12.5 Kelvin or less; or (ii) at a magnetic flux density of 9 Tesla or lower.

Assignees

• Univ Maryland
• Government Of The Us Secretary Of Commerce National Institute Of Standards And Technology
• Government Of The United States Of America

Inventors

• Elmquist Randolph
• Rigosi Albert
• Kruskopf Mattias

Classifications

• G01R33/0052 Primary

  Manufacturing aspects; Manufacturing of single devices, i.e. of semiconductor magnetic sensor chips (devices based on galvano-magnetic effect or the like H10N50/85) · CPC title

• G01R33/035

  using superconductive devices · CPC title

• G01R33/07

  Hall effect devices · CPC title

• H10N60/81

  Containers; Mountings · CPC title

• H10N60/85

  Superconducting active materials · CPC title