Power consumption control method for electronic device, electronic device, and storage medium

US11860705B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11860705-B2
Application numberUS-202217733371-A
CountryUS
Kind codeB2
Filing dateApr 29, 2022
Priority dateOct 30, 2019
Publication dateJan 2, 2024
Grant dateJan 2, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A power consumption control method for an electronic device, an electronic device, and a storage medium, and the method includes: obtaining a current state of the electronic device; determining a target integration time of an ADC sampling circuit based on the obtained current state; and adjusting an integration time of the ADC sampling circuit to the target integration time, and adjusting a power-on time of a hidden function key based on the adjusted integration time to control actual power consumption of the electronic device, wherein the integration time is positively correlated with the power-on time.

First claim

Opening claim text (preview).

The invention claimed is: 1. A power consumption control method for an electronic device, applied to an electronic device with a hidden function key, wherein the method comprises: obtaining a current state of the electronic device, wherein the current state comprises: a shutdown state, a standby state, and a use state; determining a target integration time of an ADC sampling circuit in the electronic device based on the current state; and adjusting an integration time of the ADC sampling circuit to the target integration time, and adjusting a power-on time of the hidden function key based on the adjusted integration time to control actual power consumption of the electronic device, wherein the integration time is positively correlated with the power-on time. 2. The method according to claim 1 , wherein after the obtaining a current state of the electronic device, the method further comprises: determining a target hidden function key and a non-target hidden function key based on the current state; and controlling a switch of the target hidden function key to be on, and controlling a switch of the non-target hidden function key to be off. 3. The method according to claim 2 , wherein the hidden function key comprises: at least one of a hidden power key, a hidden volume up key, and a hidden volume down key; and the determining a target hidden function key and a non-target hidden function key based on the current state comprises: if the current state is the use state, determining all the hidden power key, the hidden volume up key, and the hidden volume down key as target hidden function keys; and if the current state is the standby state or the shutdown state, determining the hidden power key as the target hidden function key, and determining the hidden volume up key and the hidden volume down key as non-target hidden function keys. 4. The method according to claim 1 , wherein the determining a target integration time of an ADC sampling circuit in the electronic device based on the current state comprises: if the current state is the use state, determining a first integration time as the target integration time of the ADC sampling circuit in the electronic device; if the current state is the standby state, determining a second integration time as the target integration time of the ADC sampling circuit in the electronic device; and if the current state is the shutdown state, determining a third integration time as the target integration time of the ADC sampling circuit in the electronic device, wherein the first integration time is greater than the second integration time, and the second integration time is greater than the third integration time. 5. The method according to claim 1 , further comprising: obtaining a power-on time and a power-off time of a key sensor of a hidden function key in each scanning cycle; and if a sum of the power-on time and the power-off time is not equal to a preset time threshold, prompting an abnormality. 6. The method according to claim 1 , further comprising: obtaining a first power-on time of each scanning cycle in the shutdown state, and obtaining a second power-on time of each scanning cycle in the use state; and if the first power-on time is greater than or equal to the second power-on time, prompting an abnormality. 7. An electronic device, comprising: hidden function key circuits and a processor, wherein the hidden function key circuits comprise: a sub-control circuit, and a plurality of key sensors electrically connected to the sub-control circuit, an amplification filter circuit, and an ADC sampling circuit, the sub-control circuit is configured to: obtain a current state of the electronic device transmitted by the processor, wherein the current state comprises: a shutdown state, a standby state, and a use state; determine a target integration time of the ADC sampling circuit based on the current state; and adjust an integration time of the ADC sampling circuit to the target integration time, and adjust a power-on time of the hidden function key based on the adjusted integration time to control actual power consumption of the electronic device, wherein the integration time is positively correlated with the power-on time. 8. The electronic device according to claim 7 , further comprising: a plurality of switches for controlling on-off of the key sensor, and the switches being in one-to-one correspondence with the hidden function keys, wherein the sub-control circuit is further configured to: determine a target hidden function key and a non-target hidden function key based on the current state; and control a switch of the target hidden function key to be on, and control a switch of the non-target hidden function key to be off. 9. The electronic device according to claim 8 , wherein the hidden function key comprises: at least one of a hidden power key, a hidden volume up key, and a hidden volume down key, the sub-control circuit is further Optionally configured to: if the current state is the use state, determine all the hidden power key, the hidden volume up key, and the hidden volume down key as target hidden function keys; and if the current state is the standby state or the shutdown state, determine the hidden power key as the target hidden function key, and determine the hidden volume up key and the hidden volume down key as non-target hidden function keys. 10. The electronic device according to claim 7 , wherein the sub-control circuit is Optionally configured to: if the current state is the use state, determine a first integration time as the target integration time of the ADC sampling circuit in the electronic device; if the current state is the standby state, determine a second integration time as the target integration time of the ADC sampling circuit in the electronic device; and if the current state is the shutdown state, determine a third integration time as the target integration time of the ADC sampling circuit in the electronic device, wherein the first integration time is greater than the second integration time, and the second integration time is greater than the third integration time. 11. The electronic device according to claim 7 , wherein the sub-control circuit is further configured to: obtain a power-on time and a power-off time of a key sensor of a hidden function key in each scanning cycle; and if a sum of the power-on time and the power-off time is not equal to a preset time threshold, prompt an abnormality. 12. The electronic device according to claim 7 , wherein the sub-control circuit is further configured to: obtain a first power-on time of each scanning cycle in the shutdown state, and obtain a second power-on time of each scanning cycle in the use state; and if the first power-on time is greater than or equal to the second power-on time, prompt an abnormality. 13. An electronic device, comprising a processor, a memory, and a computer program stored in the memory and executable on the processor, wherein when the computer program is executed by the processor, steps of the power consumption control method for an electronic device, wherein the method comprises: obtaining a current state of the electronic device, wherein the current state comprises: a shutdown state, a standby state, and a use state; determining a target integration time of an ADC sampling circuit in the electronic device based on the current state; and adjusting an integration time of the ADC sampling circuit to the target integration time, and adjusting a power-on time of the hidden function key based on the adjusted integration time to control actual power consumption of the e

Assignees

Inventors

Classifications

  • G06F1/3206Primary

    Monitoring of events, devices or parameters that trigger a change in power modality · CPC title

  • by calculating a running average of a number of subsequent samples · CPC title

  • using monitoring of local events, e.g. events related to user activity · CPC title

  • G06F1/3215Primary

    Monitoring of peripheral devices · CPC title

  • switching on or off only a part of the equipment circuit blocks · CPC title

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What does patent US11860705B2 cover?
A power consumption control method for an electronic device, an electronic device, and a storage medium, and the method includes: obtaining a current state of the electronic device; determining a target integration time of an ADC sampling circuit based on the obtained current state; and adjusting an integration time of the ADC sampling circuit to the target integration time, and adjusting a pow…
Who is the assignee on this patent?
Vivo Mobile Communication Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F1/3206. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 02 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).