Semiconductor module and semiconductor device

US11854950B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11854950-B2
Application numberUS-202117466266-A
CountryUS
Kind codeB2
Filing dateSep 3, 2021
Priority dateNov 8, 2016
Publication dateDec 26, 2023
Grant dateDec 26, 2023

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present invention is intended to provide a semiconductor module and a semiconductor device that are compatible with various rated currents. A semiconductor module includes a lead frame, and a semiconductor element joined with the lead frame. The lead frame includes a first joining structure and a second joining structure. The first joining structure includes a void part as a part at which the lead frame does not exist, and the second joining structure includes a void part as a part at which the lead frame does not exist. Each of the first joining structure and the second joining structure has a shape such that one of the first joining structure and the second joining structure complements at least part of the void part of the other assuming that the first joining structure and the second joining structure are overlapped.

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor module comprising: a lead frame including an upper surface and a lower surface; and a semiconductor element joined with the upper surface of the lead frame, wherein the lead frame includes a first joining structure, and a second joining structure, the first joining structure is disposed on a first side of the lead frame, the second joining structure is disposed on a second side of the lead frame facing to the first side, the first joining structure includes a void part as a part at which the lead frame does not exist, and a male joint, the second joining structure includes a void part as a part at which the lead frame does not exist, and a female joint, each of the first joining structure and the second joining structure being positioned entirely between a first plane defined by the upper surface to which the semiconductor element is joined, and a second plane defined by the lower surface, and each of the first joining structure and the second joining structure has a shape such that one of the first joining structure and the second joining structure complements at least part of the void part of the other, and the male joint and the female joint complement each other. 2. A semiconductor module comprising: a lead frame; and a semiconductor element joined with the lead frame, wherein the lead frame includes a first joining structure, and a second joining structure, the first joining structure is disposed on a first side of the lead frame, the second joining structure is disposed on a second side of the lead frame facing to the first side, the first joining structure includes a void part as a part at which the lead frame does not exist, and a male joint, the second joining structure includes a void part as a part at which the lead frame does not exist, and a female joint, each of the first joining structure and the second joining structure has a shape such that one of the first joining structure and the second joining structure complements at least part of the void part of the other, and the male joint and the female joint complement each other, and the male joint and the female joint are ant-shaped joints.

Assignees

Inventors

Classifications

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • the semiconductor body being completely enclosed · CPC title

  • for devices being provided for in groups H10D8/00 - H10D48/00 · CPC title

  • Multiple chips on leadframes · CPC title

  • Package configurations · CPC title

Patent family

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External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11854950B2 cover?
The present invention is intended to provide a semiconductor module and a semiconductor device that are compatible with various rated currents. A semiconductor module includes a lead frame, and a semiconductor element joined with the lead frame. The lead frame includes a first joining structure and a second joining structure. The first joining structure includes a void part as a part at which t…
Who is the assignee on this patent?
Mitsubishi Electric Corp
What technology area does this patent fall under?
Primary CPC classification H10W70/442. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 26 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).