Storage devices hiding parity swapping behavior

Patent metadata

Field	Value
Publication number	US-11853571-B2
Application number	US-202117455885-A
Country	US
Kind code	B2
Filing date	Nov 19, 2021
Priority date	Apr 24, 2020
Publication date	Dec 26, 2023
Grant date	Dec 26, 2023

Abstract

The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM 1 ), second random access memory (RAM 2 ), and a storage unit divided into a plurality of streams. By restricting the host to have a minimum write size, the data transfer speed to RAM 2 , RAM 1 , and the storage unit can be optimized. A temporary buffer is utilized within the RAM 1 to update parity data for the corresponding commands. The parity data is updated in the RAM 1 and written to the RAM 2 in the corresponding stream. The parity data may be copied from the RAM 2 to the RAM 1 to update the parity data in the temporary buffer when commands are received to write data to corresponding streams. As the parity data is updated, the corresponding command is simultaneously written to the corresponding stream.

First claim

What is claimed is:

1. A storage device, comprising:
a non-volatile storage unit, wherein a capacity of the non-volatile storage unit is divided into a plurality of streams, and wherein the non-volatile storage unit comprises a plurality of dies, each of the plurality of dies comprising a plurality of erase blocks;
a first volatile memory unit; and
a controller coupled to the non-volatile storage unit and the first volatile memory unit, the controller comprising a second volatile memory unit, wherein the controller is configured to:
copy first parity data for a first stream from the first volatile memory unit to a first location in the second volatile memory unit; and
update the first parity data with new first parity data in the second volatile memory unit, wherein the controller is further configured to simultaneously write a command to a stream and update parity data.

2. The storage device of claim 1 , further comprising SRAM or embedded MRAM.

3. A storage device, comprising:
a non-volatile storage unit, wherein a capacity of the non-volatile storage unit is divided into a plurality of streams, and wherein the non-volatile storage unit comprises a plurality of dies, each of the plurality of dies comprising a plurality of erase blocks;
a first volatile memory unit; and
a controller coupled to the non-volatile storage unit and the first volatile memory unit, the controller comprising a second volatile memory unit, wherein the controller is configured to:
copy first parity data for a first stream from the first volatile memory unit to a first location in the second volatile memory unit; and
update the first parity data with new first parity data in the second volatile memory unit, wherein the controller is further configured to move a stream between a stream open state and a stream closed state.

4. The storage device of claim 3 , wherein the first parity data is updated with the new first parity data in the first location in the second volatile memory unit.

5. The storage device of claim 3 , wherein the first parity data is updated with the new first parity data in a temporary location in the second volatile memory unit.

6. The storage device of claim 3 , wherein the controller is further configured to restrict a host device to a minimum write size.

7. A storage device, comprising:
a non-volatile storage unit, wherein a capacity of the non-volatile storage unit is divided into a plurality of streams, and wherein the non-volatile storage unit comprises a plurality of dies, each of the plurality of dies comprising a plurality of erase blocks;
a first volatile memory unit; and
a controller coupled to the non-volatile storage unit and the first volatile memory unit, the controller comprising a second volatile memory unit, wherein the controller is configured to:
copy first parity data for a first stream from the first volatile memory unit to a first location in the second volatile memory unit; and
update the first parity data with new first parity data in the second volatile memory unit, wherein the controller is further configured to:

copy the updated first parity data from the second volatile memory unit to the first volatile memory unit; and
erase a temporary location in the second volatile memory unit after the first parity data is updated with the new first parity data.

8. A storage device, comprising:
a non-volatile storage unit, wherein a capacity of the non-volatile storage unit is divided into a plurality of streams, and wherein the non-volatile storage unit comprises a plurality of dies, each of the plurality of dies comprising a plurality of erase blocks;
a first volatile memory unit; and
a controller coupled to the non-volatile storage unit and the first volatile memory unit, the controller comprising a second volatile memory unit, wherein the controller is configured to:
copy first parity data for a first stream from the first volatile memory unit to a first location in the second volatile memory unit;
update the first parity data with new first parity data in the first location in the second volatile memory unit;
copy second parity data for a second stream from the first volatile memory unit to a second location in the second volatile memory unit; and
update the second parity data with new second parity data in a temporary location in the second volatile memory unit.

9. The storage device of claim 8 , wherein the controller is further configured to copy the first parity data from the second volatile memory unit to the first volatile memory unit after updating the first parity data with the new first parity data.

10. The storage device of claim 8 , wherein the controller is further configured to copy the second parity data from the second volatile memory unit to the first volatile memory unit after updating the second parity data with the new second parity data.

11. The storage device of claim 8 , wherein a minimum write size is selected by the storage device to match a program time of writing the data associated with one or more commands to the plurality of streams to a transfer speed for copying parity data from the first volatile memory unit to the second volatile memory unit.

12. The storage device of claim 11 , wherein the minimum write size is about 1 MiB or greater.

13. The storage device of claim 8 , wherein the controller comprises an XOR engine configured to generate the first parity data and update the second parity data.

14. The storage device of claim 8 , wherein the first volatile memory unit is a DRAM unit, and wherein the second volatile memory unit is a SRAM unit.

15. A storage device, comprising:
a non-volatile storage unit, wherein a capacity of the non-volatile storage unit is divided into a plurality of streams, and wherein the non-volatile storage unit comprises a plurality of dies, each of the plurality of dies comprising a plurality of erase blocks;
a DRAM unit; and
a controller coupled to the non-volatile storage unit and the DRAM unit, the controller comprising a SRAM unit, wherein the controller is configured to:
copy first parity data for a first stream from the DRAM unit to a first location in the SRAM unit;
combine the first parity data with new first parity data in the SRAM unit; and
copy the combined first parity data from the SRAM unit to a first location in the DRAM unit.

16. The storage device of claim 15 , wherein a minimum write size is about 1 MiB or greater.

17. The storage device of claim 15 , wherein a minimum write size is based on an amount of time it takes to generate the new first parity data.

18. The storage device of claim 15 , wherein the controller is further configured to calculate and determine a minimum write size for commands to write data received from a host device.

19. The storage device of claim 15 , wherein the controller is further configured to erase a temporary location in the SRAM unit after copying the combined first parity data from the SRAM unit to the DRAM unit.

20. The storage device of claim 15 , wherein the controller is further configured to:
receive a second command to write data in a minimum write size to the first stream;
simultaneously, update the combined first parity data for the first stream in the first location in the SRAM unit, and write the data associated with the second command to the first stream; and
copy the updated combined first parity data from the SRAM unit to the first location in the DRAM unit.

Assignees

• Western Digital Tech Inc

Inventors

• Gorobets Sergey Anatolievich
• Helmick Daniel L
• Grayson Peter

Classifications

• G06F3/064 Primary

  Management of blocks · CPC title

• G06F3/0619

  in relation to data integrity, e.g. data losses, bit errors · CPC title

• G06F3/0652

  Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket · CPC title

• G06F3/0653

  Monitoring storage devices or systems · CPC title

• G06F3/0659 Primary

  Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title