Backside etch process for transparent silicon oxide technology

US11852800B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11852800-B2
Application numberUS-202217987157-A
CountryUS
Kind codeB2
Filing dateNov 15, 2022
Priority dateMay 6, 2020
Publication dateDec 26, 2023
Grant dateDec 26, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

Increasing transparency of one or more micro-displays. A method includes attaching a transparent cover to at least a portion of a semiconductor wafer. The at least a portion of the semiconductor wafer includes the one or more micro-displays. The one or more micro-displays include one or more active silicon areas. The method further includes, after the transparent cover has been attached to the at least a portion of the semiconductor wafer, removing silicon between one or more of the active silicon areas, causing the one or more micro-displays to have a transparency of at least 50%.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of increasing transparency of one or more micro-displays, the method comprising: attaching a transparent cover to at least a portion of a semiconductor wafer, the at least a portion of the semiconductor wafer comprising the one or more micro-displays, the one or more micro-displays comprising one or more active silicon areas; and after the transparent cover has been attached to the at least a portion of the semiconductor wafer, removing silicon between one or more of the active silicon areas, wherein removing silicon between one or more of the active silicon areas causes the one or more micro-displays to have a transparency for incoming light coming into the one or more micro-displays and through the one or more micro-displays of at least 50%. 2. The method of claim 1 , wherein the transparent cover comprises a glass material. 3. The method of claim 1 , further comprising adding an OLED stack to the portion of a semiconductor wafer. 4. The method of claim 1 , wherein removing silicon between the one or more of the active silicon areas comprises removing non-active silicon islands formed by forming oxide trenches in silicon of the at least a portion of a semiconductor wafer. 5. The method of claim 1 , wherein removing silicon between the one or more of the active silicon areas comprises removing portions of a silicon substrate to form active silicon islands. 6. The method of claim 1 , further comprising removing portions of a silicon oxide covering the silicon between the one or more of the active silicon areas and using remaining portions of the silicon oxide as a mask for removing the silicon between the one or more of the active silicon areas. 7. The method of claim 1 , further comprising filling an area between with active silicon areas with a backside fill material. 8. The method of claim 1 , further comprising coupling one of the micro-displays to a fiber optic coupled to an image intensifier of a night-vision system to cause a digital heads-up display to be displayed in conjunction with an analog night vision image by light from the analog night vision image being transmitted through the micro-display. 9. The method of claim 1 , wherein at least one of the micro-displays comprises at least a 36 μm pitch and has a transparency of at least 75% as a result of removing silicon between one or more of the active silicon areas. 10. The method of claim 1 , wherein at least one of the micro-displays comprises at least a 22.5 μm pitch and has a transparency of at least 60% as a result of removing silicon between one or more of the active silicon areas. 11. The method of claim 1 , wherein at least one of the micro-displays comprises at least a 17.5 μm pitch and has a transparency of at least 50% as a result of removing silicon between one or more of the active silicon areas. 12. A method of increasing transparency of one or more micro-displays, the method comprising: obtaining a semiconductor wafer, the semiconductor wafer comprising: a substrate comprising silicon; a buried oxide layer coupled to the substrate; and a plurality of active silicon islands coupled to the buried oxide layer, and separated from each other by non-active silicon islands and oxide trenches; attaching a cover glass to the semiconductor wafer; after attaching the cover glass to the semiconductor wafer, removing the silicon substrate; and after attaching the cover glass to the semiconductor wafer, removing at least a portion of the non-active silicon islands and oxide trenches, wherein removing at least a portion of the non-active silicon islands and oxide trenches causes the one or more micro-displays to have a transparency of at least 50%. 13. The method of claim 12 , wherein removing at least the portion of the non-active silicon islands and oxide trenches comprises removing a portion of the buried oxide layer, and using remaining buried oxide as a hard mask. 14. The method of claim 12 , further comprising adding a transparent backfill material between the active silicon islands after removing the at least a portion of the non-active silicon islands and oxide trenches. 15. The method of claim 14 , wherein the transparent backfill material comprises a two-part epoxy for coupling a micro-display to a fiber optic for an analog night vision system to allow light from an image intensifier to be transmitted through the micro-display. 16. The method of claim 12 , wherein removing at least the portion of the non-active silicon islands and oxide trenches results in at least an 80% increase in transparency for at least one micro display. 17. A micro-display comprising: a glass cover; a semiconductor wafer coupled to the glass cover, the semiconductor wafer comprising: a buried oxide layer; and a plurality of active silicon islands coupled to the buried oxide layer, and separated from each other by space created by non-active silicon islands and oxide trenches having been removed after the glass cover was coupled to the semiconductor wafer, wherein the oxide trenches having been removed causes the micro-display to have a transparency for incoming light coming into the one or more micro-displays and through the one or more micro-displays of at least 50%. 18. The micro-display of claim 17 , wherein the buried oxide layer comprises a hard mask used to remove the non-active silicon islands. 19. The micro-display of claim 17 , further comprising a transparent backfill material between the active silicon islands. 20. The micro-display of claim 17 , further comprising a transparent backfill material between the active silicon islands, the transparent backfill material comprising a two-part epoxy for coupling the micro-display to a fiber optic for an analog night vision system to allow light from an image intensifier to be transmitted through the micro-display.

Assignees

Inventors

Classifications

  • Self-supporting sealing arrangements · CPC title

  • comprising devices for improving the contrast of the display / brillance control visibility · CPC title

  • Substrates, e.g. flexible substrates · CPC title

  • Stacked devices having two or more layers, each emitting at different wavelengths · CPC title

  • characterised by optical features · CPC title

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What does patent US11852800B2 cover?
Increasing transparency of one or more micro-displays. A method includes attaching a transparent cover to at least a portion of a semiconductor wafer. The at least a portion of the semiconductor wafer includes the one or more micro-displays. The one or more micro-displays include one or more active silicon areas. The method further includes, after the transparent cover has been attached to the …
Who is the assignee on this patent?
L3Harris Technologies Inc
What technology area does this patent fall under?
Primary CPC classification G02B23/125. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 26 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).