Temperature sensor for non-volatile memory

Patent metadata

Field	Value
Publication number	US-11852544-B2
Application number	US-202117219160-A
Country	US
Kind code	B2
Filing date	Mar 31, 2021
Priority date	Feb 25, 2021
Publication date	Dec 26, 2023
Grant date	Dec 26, 2023

Abstract

Embodiments of the present disclosure provide a temperature sensor that may be integrated into a memory device along with a 1T1C reference voltage generator to enable the 1T1C reference voltage generator to provide a temperature dependent 1T1C reference voltage to a memory core (e.g., F-RAM memory core) of the memory device. The temperature sensor may detect a temperature of the memory core, and output this information (e.g., as a trim) for use by the 1T1C reference voltage generator in providing a temperature dependent 1T1C reference voltage. In this way, both the P-term and U-term margins of the memory core may be maintained even as a temperature of the memory core increases.

First claim

What is claimed is:

1. An apparatus comprising:
a resistor circuit comprising a set of resistors configured to control a reference voltage based on a temperature of a memory, each resistor of the set of resistors having a first or second temperature coefficient, and wherein a first resistor of the set of resistors modifies its resistance value based on the temperature of the memory until the reference voltage and an output voltage are equal;
a comparator configured to output count-up signals and count-down signals; and
a counter configured to:
increment and decrement a current count value based on the count-up signals and the count-down signals output by the comparator; and
periodically output a word corresponding to the current count value, the word indicating the temperature of the memory to the first resistor,

wherein the resistor circuit comprises a resistor ladder including a number of second resistors in series with the first resistor, and wherein the first resistor comprises a positive first temperature coefficient, and the number of second resistors include one or more resistors, each having a second temperature coefficient that less than the first temperature coefficient.

2. The apparatus of claim 1 , wherein to output count up and count down signals, the comparator is configured to:
compare the reference voltage with the output voltage; and
output a count up signal to the counter if the output voltage is lower than the reference voltage and output a count-down signal to the counter if the output voltage is higher than the reference voltage.

3. The apparatus of claim 2 , wherein a toggling of the current count value between two different values indicates that the reference voltage and the output voltage are equal, and wherein a word output subsequent to the toggling of the current count value indicates a current temperature of the memory.

4. The apparatus of claim 3 , further comprising:
a count translator configured to:
translate the word output subsequent to the toggling of the current count value into a trim value; and
output the trim value to a reference signal generator of a memory device, the memory device including the memory.

5. The apparatus of claim 4 , wherein the reference signal generator is a one transistor one capacitor (1T1C) reference signal generator.

6. The apparatus of claim 1 , wherein the memory is a ferroelectric random access memory (F-RAM).

7. The apparatus of claim 1 ,
wherein the first resistor comprises an Nwell resistor, and the number of second resistors comprise silicide-blocked polysilicon resistors; and
wherein the second temperature coefficient does not result in a change in resistance of the number of second resistors based on the temperature of the memory relative to the first temperature coefficient.

8. A system comprising:
a memory;
a reference signal generator configured to generate a reference signal based on a current temperature of the memory; and
a temperature sensor comprising:
a resistor circuit comprising a set of resistors configured to control a reference voltage based on a temperature of the memory, each resistor of the set of resistors having a first or second temperature coefficient, and wherein a first resistor of the set of resistors modifies its resistance value based on the temperature of the memory until the reference voltage and an output voltage are equal;
a comparator configured to output count-up signals and count-down signals; and a counter configured to:
increment and decrement a current count value based on the count-up signals and the count-down signals output by the comparator; and
periodically output a word corresponding to the current count value, the word indicating the temperature of the memory to the first resistor,

wherein one or more resistors of the set of resistors having the first temperature coefficient comprises an Nwell resistor, and one or more resistors of the set of resistors having the second temperature coefficient comprises a silicide-blocked polysilicon resistor.

9. The system of claim 8 , wherein to output count up and count down signals, the comparator is configured to:
compare the reference voltage with the output voltage; and
output a count up signal to the counter if the output voltage is lower than the reference voltage and output a count-down signal to the counter if the output voltage is higher than the reference voltage.

10. The system of claim 9 , wherein a toggling of the current count value between two different values indicates that the reference voltage and the output voltage are equal, and wherein a word output subsequent to the toggling of the current count value indicates a current temperature of the memory.

11. The system of claim 10 , wherein the temperature sensor further comprises:
a count translator configured to:
translate the word output subsequent to the toggling of the current count value into a trim value; and
output the trim value to the reference signal generator.

12. The system of claim 11 , wherein the reference signal is a one transistor one capacitor (1T1C) reference signal.

13. The system of claim 8 , further comprising:
a buzzer circuit configured to operate the temperature sensor at periodic intervals and to maintain the temperature sensor in a low power state outside of the periodic intervals.

14. An apparatus comprising:
a resistor circuit comprising a set of resistors configured to control a reference voltage based on a temperature of a memory, each resistor of the set of resistors having a first or second temperature coefficient;
a resistor stack coupled to the resistor circuit, the resistor stack comprising a plurality of tap points, and wherein an output voltage at each of the plurality of tap points is successively lower than an output voltage at a previous tap point; and
a plurality of comparators, each comparator of the plurality of comparators coupled to a corresponding tap point from the plurality of tap points, and wherein each of the plurality of comparators is configured to:
compare an output voltage at the corresponding tap point to the reference voltage; and
output a high signal when the output voltage of the corresponding tap point is greater than the reference voltage,

wherein one or more resistors of the set of resistors having the first temperature coefficient comprises an Nwell resistor, and one or more resistors of the set of resistors having the second temperature coefficient comprises a silicide-blocked polysilicon resistor.

15. The apparatus of claim 14 , wherein the reference voltage decreases as the temperature increases based on a ratio of resistance values among the set of resistors such that each successive comparator of the plurality of comparators outputs a respective high signal as the temperature of the memory rises.

16. The apparatus of claim 15 , wherein each of the plurality of comparators outputs the respective high signal to a reference signal generator of a memory device, the memory device including the memory.

17. The apparatus of claim 15 , wherein each successive high signal defines a temperature zone such that a plurality of temperature zones is defined.

18. The apparatus of claim 14 , wherein the set of resistors comprises:
one or more resistors having the first temperature coefficient, the first temperature coefficient being positive; and
one or more resistors having the second temperature coefficient, wherein the second temperature coefficient does not result in a change in resistance based on the temperature of the memory relativ

Assignees

• Infineon Technologies LLC

Inventors

• Machavolu Srikanth
• Sohani Sheshadri
• Jain Kapil
• Devilbiss Alan D

Classifications

• G01K7/16 Primary

  using resistive elements · CPC title

• G01K7/01

  using semiconducting elements having PN junctions (G01K7/02, G01K7/16, G01K7/30 take precedence) · CPC title

• G01K7/206 Primary

  in a potentiometer circuit · CPC title

• G01K3/005

  Circuits arrangements for indicating a predetermined temperature (fire detection G08B17/00) · CPC title